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参数资料
| 型号： | AD7477AAKSZ-REEL |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | ADC |
| 英文描述： | Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:12; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Square Flange Receptacle; Body Style:Straight |
| 中文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6 |
| 封装： | ROHS COMPLIANT, MO-203AB, SC-70, 6 PIN |
| 文件页数： | 18/24页 |
| 文件大小： | 580K |
| 代理商： | AD7477AAKSZ-REEL |
REV. C
–18–
AD7476A/AD7477A/AD7478A
time is another cycle, i.e., 1
μ
s, the AD7476A/AD7477A/
AD7478A can be said to dissipate 17.5 mW for 2
μ
s during each
conversion cycle. If the throughput rate is 100 kSPS, the cycle time is
10
μ
s and the average power dissipated during each cycle is
(2/10) (17.5 mW) = 3.5 mW. If V
DD
= 3 V, SCLK = 20 MHz,
and the devices are again in power-down mode between conver-
sions, then the power dissipation during normal operation is
5.1 mW. The AD7476A/AD7477A/AD7478A can now be said
to dissipate 5.1 mW for 2
μ
s during each conversion cycle. With
a throughput rate of 100 kSPS, the average power dissipated
during each cycle is (2/10) (5.1 mW) = 1.02 mW. Figure 12
shows the power versus the throughput rate when using the
power-down mode between conversions with both 5 V and 3 V
supplies.
The power-down mode is intended for use with throughput
rates of approximately 333 kSPS and under, since at higher
sampling rates there is no power saving made by using the
power-down mode.
THROUGHPUT – kSPS
100
0.1
0
P
10
1
0.01
50
100
150
200
250
300
350
V
DD
= 5V, SCLK = 20MHz
V
DD
= 3V, SCLK = 20MHz
Figure 12. Power vs. Throughput
SERIAL INTERFACE
Figures 13, 14, and 15 show the detailed timing diagrams for
serial interfacing to the AD7476A, AD7477A, and AD7478A,
respectively. The serial clock provides the conversion clock and
also controls the transfer of information from the AD7476A/
AD7477A/AD7478A during conversion.
The
CS
signal initiates the data transfer and conversion process.
The falling edge of
CS
puts the track-and-hold into hold mode and
takes the bus out of three-state; the analog input is sampled at this
point. Also, the conversion is initiated at this point.
For the AD7476A, the conversion will require 16 SCLK cycles to
complete. Once 13 SCLK falling edges have elapsed, the track-and-
hold will go back into track on the next SCLK rising edge, as shown
in Figure 13 at Point B. On the 16th SCLK falling edge, the SDATA
line will go back into three-state. If the rising edge of
CS
occurs
before 16 SCLKs have elapsed, the conversion will be terminated
and the SDATA line will go back into three-state; otherwise, SDATA
returns to three-state on the 16th SCLK falling edge, as shown in
Figure 13. Sixteen serial clock cycles are required to perform the
conversion process and to access data from the AD7476A.
For the AD7477A, the conversion will require 14 SCLK cycles
to
complete. Once 13 SCLK falling edges have elapsed, the track-
and-hold will go back into track on the next rising edge as
shown in Figure 14 at Point B. If the rising edge of
CS
occurs
before 14 SCLKs have elapsed, the conversion will be terminated
and the SDATA line will go back into three-state. If 16 SCLKs
are considered in the cycle, SDATA will return to three-state on
the 16th SCLK falling edge, as shown in Figure 14.
For the AD7478A, the conversion will require 12 SCLK cycles
to complete. The track-and-hold will go back into track on the
rising edge after the 11th falling edge, as shown in Figure 15 at
Point B. If the rising edge of
CS
occurs before 12 SCLKs have
CS
SCLK
SDATA
t
2
t
6
t
3
t
4
ZERO
t
7
DB10
t
5
t
8
t
CONVERT
t
QUIET
ZERO
ZERO
DB11
DB2
DB1
DB0
B
THREE-STATE
THREE-
STATE
Z
4 LEADING ZEROS
1
2
3
4
5
13
14
15
16
t
1
1/THROUGHPUT
Figure 13. AD7476A Serial Interface Timing Diagram
SCLK
1
5
13
15
4 LEADING ZEROS
THREE-STATE
t
4
2
3
4
16
t
5
t
3
t
2
DB9
DB8
DB0
ZERO
t
6
t
7
t
8
14
ZERO
ZERO
ZERO
Z
t
1
1/THROUGHPUT
ZERO
2 TRAILING ZEROS
SDATA
t
CONVERT
t
QUIET
B
THREE-STATE
CS
Figure 14. AD7477A Serial Interface Timing Diagram
相关PDF资料 |
PDF描述 |
|---|---|
| AD7478AAKSZ-REEL | Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:3; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Square Flange Receptacle; Body Style:Straight |
| AD7477AAKSZ-REEL7 | GT 12C 6#12 6#16 PIN RECP WALL |
| AD7478AAKSZ-REEL7 | GT 12C 6#12 6#16 SKT RECP WALL |
| AD7476AYKSZ-REEL7 | 2.35 V to 5.25 V, 1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SC70 |
| AD7476SRTZ-R2 | PTSE 11C 11#16 STR PLUG |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7477AAKSZ-REEL3 | 制造商:AD 制造商全称:Analog Devices 功能描述:2.35 V to 5.25 V, 1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SC70 |
| AD7477AAKSZ-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 10-bit Serial 6-Pin SC-70 T/R |
| AD7477AAKSZ-REEL73 | 制造商:AD 制造商全称:Analog Devices 功能描述:2.35 V to 5.25 V, 1 MSPS, 12-/10-/8-Bit ADCs in 6-Lead SC70 |
| AD7477AARM | 制造商:Rochester Electronics LLC 功能描述:10-BIT LOW POWER ADC IN USOIC PKG I.C - Bulk 制造商:Analog Devices 功能描述:IC 10BIT ADC SMD 7477 MSOP8 |
| AD7477AARM-REEL | 制造商:Analog Devices 功能描述:ADC SGL SAR 1MSPS 10-BIT SERL 8MSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:10-BIT LOW POWER ADC IN USOIC PKG I.C - Tape and Reel |
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