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参数资料
型号： AD7714YRZ
厂商： Analog Devices Inc
文件页数： 12/40页
文件大小： 0K
描述： IC ADC 24BIT SIGMA-DELTA 24SOIC
标准包装： 31
位数： 24
采样率（每秒）： 1k
数据接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
转换器数目： 1
功率耗散（最大）： 7mW
电压电源： 模拟和数字
工作温度： -40°C ~ 105°C
安装类型： 表面贴装
封装/外壳： 24-SOIC（0.295"，7.50mm 宽）
供应商设备封装： 24-SOIC W
包装： 管件
输入数目和类型： 3 个差分，单极；3 个差分，双极；5 个伪差分，单极；5 个伪差分，双极
配用： EVAL-AD7714-3EBZ-ND - BOARD EVAL FOR AD7714
Parameter
A Versions1
Units
Conditions/Comments
STATIC PERFORMANCE
No Missing Codes
24
Bits min
Guaranteed by Design. Bipolar Mode. For Filter Notches
≤ 60 Hz
22
Bits min
For Filter Notch = 100 Hz
18
Bits min
For Filter Notch = 250 Hz
15
Bits min
For Filter Notch = 500 Hz
12
Bits min
For Filter Notch = 1 kHz
Output Noise
See Tables I to IV
Depends on Filter Cutoffs and Selected Gain
Integral Nonlinearity
±0.0015
% of FSR max
Filter Notches
≤ 60 Hz
Unipolar Offset Error
See Note 2
Unipolar Offset Drift3
0.5
V/°C typ
For Gains of 1, 2, 4
0.3
V/°C typ
For Gains of 8, 16, 32, 64, 128
Bipolar Zero Error
See Note 2
Bipolar Zero Drift3
0.5
V/°C typ
For Gains of 1, 2, 4
0.3
V/°C typ
For Gains of 8, 16, 32, 64, 128
Positive Full-Scale Error4
See Note 2
Full-Scale Drift
3, 5
0.5
V/°C typ
For Gains of 1, 2, 4
0.3
V/°C typ
For Gains of 8, 16, 32, 64, 128
Gain Error6
See Note 2
Gain Drift3, 7
0.5
ppm of FSR/
°C typ
Bipolar Negative Full-Scale Error
±0.0015
% of FSR max
Typically
±0.0004%
Bipolar Negative Full-Scale Drift
3
1
V/°C typ
For Gains of 1, 2, 4
0.6
V/°C typ
For Gains of 8, 16, 32, 64, 128
ANALOG INPUTS/REFERENCE INPUTS
Specifications for AIN and REF IN Unless Noted
Input Common-Mode Rejection (CMR)
90
dB min
At DC. Typically 102 dB
Normal-Mode 50 Hz Rejection8
100
dB min
For Filter Notches of 10
Hz, 25 Hz, 50 Hz,
±0.02 × f
NOTCH
Normal-Mode 60 Hz Rejection
8
100
dB min
For Filter Notches of 10
Hz, 30 Hz, 60 Hz,
±0.02 × f
NOTCH
Common-Mode 50 Hz Rejection8
150
dB min
For Filter Notches of 10
Hz, 25 Hz, 50 Hz,
±0.02 × f
NOTCH
Common-Mode 60 Hz Rejection8
150
dB min
For Filter Notches of 10
Hz, 30 Hz, 60 Hz,
±0.02 × f
NOTCH
Common-Mode Voltage Range9
AGND to AVDD
V min to V max
AIN for BUFFER = 0 and REF IN
Absolute AIN/REF IN Voltage9
AGND – 30 mV
V min
AIN for BUFFER = 0 and REF IN
AVDD + 30 mV
V max
Absolute/Common-Mode AIN Voltage9
AGND + 50 mV
V min
BUFFER = 1. A Version
AVDD – 1.5 V
V max
AIN Input Current8
1
nA max
A Version
AIN Sampling Capacitance8
7
pF max
AIN Differential Voltage Range
10
0 to +VREF/GAIN
11
nom
Unipolar Input Range (B/U Bit of Filter High Register = 1)
±V
REF/GAIN
nom
Bipolar Input Range (B/U Bit of Filter High Register = 0)
AIN Input Sampling Rate, fS
GAIN
× f
CLK IN/64
For Gains of 1, 2, 4
fCLK IN/8
For Gains of 8, 16, 32, 64, 128
REF IN(+) – REF IN(–) Voltage
+2.5
V nom
±1% for Specified Performance. Functional with Lower V
REF
REF IN Input Sampling Rate, fS
fCLK IN/64
LOGIC INPUTS
Input Current
±10
A max
All Inputs Except MCLK IN
VINL, Input Low Voltage
0.8
V max
DVDD = +5 V
VINL, Input Low Voltage
0.4
V max
DVDD = +3.3 V
VINH, Input High Voltage
2.4
V min
DVDD = +5 V
VINH, Input High Voltage
2.0
V min
DVDD = +3.3 V
MCLK IN Only
VINL, Input Low Voltage
0.8
V max
DVDD = +5 V
VINL, Input Low Voltage
0.4
V max
DVDD = +3.3 V
VINH, Input High Voltage
3.5
V min
DVDD = +5 V
VINH, Input High Voltage
2.5
V min
DVDD = +3.3 V
LOGIC OUTPUTS (Including MCLK OUT)
VOL, Output Low Voltage
0.4
V max
ISINK = 800 A Except for MCLK OUT.
12 DV
DD = +5 V
VOL, Output Low Voltage
0.4
V max
ISINK = 100
A Except for MCLK OUT.12 DV
DD = +3.3 V
VOH, Output High Voltage
4.0
V min
ISOURCE = 200 A Except for MCLK OUT.
12 DV
DD = +5 V
VOH, Output High Voltage
DVDD – 0.6 V
V min
ISOURCE = 100 A Except for MCLK OUT.
12 DV
DD = +3.3 V
Floating State Leakage Current
±10
A max
Floating State Output Capacitance13
9
pF typ
Data Output Coding
Binary
Unipolar Mode
Offset Binary
Bipolar Mode
NOTES
1Temperature range is as follows: A Versions: –40
°C to +85°C.
2A calibration is effectively a conversion so these errors will be of the order of the conversion noise shown in Tables I to IV. This applies after calibration at the temperature of interest.
3Recalibration at any temperature will remove these drift errors.
4Positive Full-Scale Error includes Zero-Scale Errors (Unipolar Offset Error or Bipolar Zero Error) and applies to both unipolar and bipolar input ranges.
5Full-Scale Drift includes Zero-Scale Drift (Unipolar Offset Drift or Bipolar Zero Drift) and applies to both unipolar and bipolar input ranges.
6Gain Error does not include Zero-Scale Errors. It is calculated as Full-Scale Error—Unipolar Offset Error for unipolar ranges and Full-Scale Error—Bipolar Zero Error for
bipolar ranges.
AD7714-5–SPECIFICATIONS (AV
DD = +5 V, DVDD = +3.3 V or +5 V, REF IN(+) = +2.5 V; REF IN(–) = AGND;
fCLK IN = 2.4576 MHz unless otherwise noted. All specifications TMIN to TMAX unless otherwise noted.)
REV. C
–2–
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