参数资料
型号: AD7715ARU-5REEL
厂商: Analog Devices Inc
文件页数: 14/40页
文件大小: 0K
描述: IC ADC 16BIT SIGMA-DELTA 16TSSOP
标准包装: 2,500
位数: 16
采样率(每秒): 500
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 9.5mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极;1 个差分,双极
配用: EVAL-AD7715-3EBZ-ND - BOARD EVALUATION FOR AD7715
AD7715
Rev. D | Page 21 of 40
REFERENCE INPUT
The reference inputs of the AD7715, REF IN(+) and REF IN(),
provide a differential reference input capability. The common-
mode range for these differential inputs is from AGND to AVDD.
The nominal reference voltage, VREF (REF IN(+) REF IN()),
for specified operation is 2.5 V for the AD7715-5 and 1.25 V for
the AD7715-3. The part is functional with VREF voltages down
to 1 V but with degraded performance as the output noise will,
in terms of LSB size, be larger. REF IN(+) must always be
greater than REF IN() for correct operation of the AD7715.
Both reference inputs provide a high impedance, dynamic load
similar to the analog inputs in unbuffered mode. The maximum
dc input leakage current is ±1 nA over temperature and source
resistance may result in gain errors on the part. In this case,
the sampling switch resistance is 5 kΩ typical and the reference
capacitor (CREF) varies with gain. The sample rate on the refer-
ence inputs is fCLK IN/64 and does not vary with gain. For gains
of 1 and 2, CREF is 8 pF; for a gain of 32, it is 4.25 pF, and for a
gain of 128, it is 3.3125 pF.
The output noise performance outlined in Table 15 through
Table 22 is for an analog input of 0 V which effectively removes
the effect of noise on the reference. To obtain the same noise
performance as shown in the noise tables over the full input
range requires a low noise reference source for the AD7715. If
the reference noise in the bandwidth of interest is excessive, it
will degrade the performance of the AD7715. In applications
where the excitation voltage for the bridge transducer on the
analog input also derives the reference voltage for the part,
the effect of the noise in the excitation voltage will be removed
as the application is ratiometric. Recommended reference
voltage sources for the AD7715-5 include the AD780, REF43
and REF192, while the recommended reference sources for
the AD7715-3 include the AD589 and AD1580. It is generally
recommended to decouple the output of these references to
further reduce the noise level.
DIGITAL FILTERING
The AD7715 contains an on-chip low-pass digital filter that
processes the output of the part’s Σ-Δ modulator. Therefore, the
part not only provides the analog-to-digital conversion function
but it also provides a level of filtering. Users should be aware
that there are a number of system differences when the filtering
function is provided in the digital domain rather than the
analog domain.
First, since digital filtering occurs after the A-to-D conversion
process, it can remove noise injected during the conversion
process. Analog filtering cannot do this. Also, the digital filter
can be made programmable far more readily than an analog
filter. Depending on the digital filter design, this gives the user
the capability of programming cutoff frequency and output
update rate.
On the other hand, analog filtering can remove noise super-
imposed on the analog signal before it reaches the ADC. Digital
filtering cannot do this and noise peaks riding on signals near
full scale have the potential to saturate the analog modulator
and digital filter, even though the average value of the signal is
within limits. To alleviate this problem, the AD7715 has overrange
headroom built into the Σ-Δ modulator and digital filter which
allows overrange excursions of 5% above the analog input range. If
noise signals are larger than this, consideration should be given
to analog input filtering, or to reducing the input channel voltage
so that its full scale is half that of the analog input channel full
scale. This provides an overrange capability greater than 100%
at the expense of reducing the dynamic range by 1 bit (50%).
In addition, the digital filter does not provide any rejection at
integer multiples of the digital filter’s sample frequency. However,
the input sampling on the part provides attenuation at multiples
of the digital filter’s sampling frequency so that the unattenuated
bands actually occur around multiples of the sampling frequency
fS (as defined in Table 25). Thus the unattenuated bands occur
at n × fS (where n = 1, 2, 3 … ). At these frequencies, there are
frequency bands, ±f3 dB wide (f3 dB is the cutoff frequency of the
digital filter) at either side where noise passes unattenuated to
the output.
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