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| 型号： | AD7834AR-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/28页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT QUAD SRL 28-SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 1,000 |
| 设置时间： | 10µs |
| 位数： | 14 |
| 数据接口： | 串行 |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 465mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 4 电压，单极；4 电压，双极 |
| 采样率（每秒）： | 100k |
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AD7834/AD7835
Rev. D | Page 8 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
28
27
26
25
24
23
22
21
TOP VIEW
(Not to Scale)
NC = NO CONNECT
VSS
NC
AGND
DSG
VREF(–)
VREF(+)
VOUT1
VDD
NC
VOUT2
VOUT4
DGND
VCC
SCLK
LDAC
CLR
VOUT3
DIN
PA0
PA1
PA2
FSYNC
PA3
PA4
PAEN
AD7834
01006-006
Figure 6. AD7834 PDIP and SOIC Pin Configuration
Table 7. AD7834 Pin Function Descriptions
Pin No.
Pin Mnemonic
Description
1
VSS
Negative Analog Power Supply: 15 V ± 5% or 12 V ± 5%.
2
DSG
Device Sense Ground Input. Used in conjunction with the CLR input for power-on protection of
the DACs. When CLR is low, the DAC outputs are forced to the potential on the DSG pin.
3
VREF()
Negative Reference Input. The negative reference voltage is referred to AGND.
4
VREF(+)
Positive Reference Input. The positive reference voltage is referred to AGND.
5, 24, 25, 26, 27
NC
No Connect.
VOUT1 to VOUT4
22, 6, 21, 7
DAC Outputs.
8
DGND
Digital Ground.
9
VCC
Logic Power Supply: 5 V ± 5%.
10
SCLK
Clock Input. Used for writing data to the device; data is clocked into the input register on the
falling edge of SCLK.
11
DIN
Serial Data Input.
12,13,14,15,16
PA0 to PA4
Package Address Inputs. These inputs are hardwired high (VCC) or low (DGND) to assign dedicated
package addresses in a multipackage environment.
17
PAEN
Package Address Enable Input. When low, this input allows normal operation of the device. When
high, the device ignores the package address, but not the channel address, in the serial data
stream and loads the serial data into the input registers. This feature is useful in a multipackage
application where it can be used to load the same data into the same channel in each package.
18
FSYNC
Frame Sync Input. Active low logic input used, in conjunction with DIN and SCLK, to write data to
the device with serial data expected after the falling edge of this signal. The contents of the 24-bit
serial-to-parallel input register are transferred on the rising edge of this signal.
19
LDAC
Load DAC Input (Level Sensitive). This input signal, in conjunction with the FSYNC input signal,
determines how the analog outputs are updated. If LDAC is maintained high while new data is
being loaded into the device’s input registers, no change occurs on the analog outputs.
Subsequently, when LDAC is brought low, the contents of all four input registers are transferred
into their respective DAC latches, updating all of the analog outputs simultaneously.
20
CLR
Asynchronous Clear Input (Level Sensitive, Active Low). When this input is brought low, all analog
outputs are switched to the externally set potential on the DSG pin. When CLR is brought high, the
signal outputs remain at the DSG potential until LDAC is brought low. When LDAC is brought low,
the analog outputs are switched back to reflect their individual DAC output levels. As long as CLR
remains low, the LDAC signals are ignored, and the signal outputs remain switched to the
potential on the DSG pin.
23
VDD
Positive Analog Power Supply: 15 V ± 5% or 12 V ± 5%.
28
AGND
Analog Ground.
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| AD7834ARZ | 功能描述:IC DAC 14BIT QUAD SRL 28-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD7834ARZ-REEL | 功能描述:IC DAC 14BIT QUAD SERIAL 28SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
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| AD7834BNZ | 制造商:Analog Devices 功能描述:DAC 4-CH R-2R 14-bit 28-Pin PDIP W Tube |
| AD7834BR | 功能描述:IC DAC 14BIT QUAD SRL 28-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1,000 系列:- 设置时间:1µs 位数:8 数据接口:串行 转换器数目:8 电压电源:双 ± 功率耗散（最大）:941mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC W 包装:带卷 (TR) 输出数目和类型:8 电压，单极 采样率（每秒）:* |
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