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| 型号： | AD7938BSUZ-6 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/32页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 8CHAN 32TQFP |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 625k |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 7.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
| 输入数目和类型： | 8 个单端，单极；4 个差分，单极；4 个伪差分，单极；7 伪差分，单极 |
| 配用： | EVAL-AD7938CBZ-ND - EVAL BOARD FOR AD7938 |
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Data Sheet
AD7938-6
Rev. C | Page 17 of 32
04
75
1-
0
26
100...000
011...111
1 LSB = 2 × VREF/4096
A
DC
CO
DE
–VREF + 1 LSB
VREF
+VREF – 1 LSB
100...001
100...010
011...110
000...001
000...000
111...111
Figure 17. AD7938-6 Ideal Transfer Characteristic
with Twos Complement Output Coding and 2 × VREF Range
TYPICAL CONNECTION DIAGRAM
Figure 18 shows a typical connection diagram for the
AD7938-6. The AGND and DGND pins are connected together
at the device for good noise suppression. The VREFIN/VREFOUT pin
is decoupled to AGND with a 0.47 μF capacitor to avoid noise
pickup if the internal reference is used. Alternatively, VREFIN/VREFOUT
can be connected to an external reference source. In this case,
the reference pin should be decoupled with a 0.1 μF capacitor.
In both cases, the analog input range can either be 0 V to VREF
(RANGE bit = 0) or 0 V to 2 × VREF (RANGE bit = 1). The
analog input configuration can be either eight single-ended
inputs, four differential pairs, four pseudo differential pairs, or
connected to either a 3 V or 5 V supply. The voltage applied to
the VDRIVE input controls the voltage of the digital interface and
here, it is connected to the same 3 V supply of the microprocessor
to allow a 3 V logic interface (see the Digital Inputs section).
04
75
1
-0
2
7
0.1F
10F
3V/5V
SUPPLY
M
ICRO
CO
NT
RO
L
E
R/
M
IC
R
O
P
R
O
C
ES
SO
R
AD7938-6
0.1F
0TO VREF/
3V
SUPPLY
0.1F EXTERNAL VREF
0.47F INTERNAL VREF
0 TO 2 × VREF
AGND
DGND
W/B
CLKIN
CS
VDRIVE
VIN0
VDD
VREFIN/VREFOUT
VIN7
10F
2.5V
VREF
RD
CONVST
WR
BUSY
DB0
DB11/DB9
Figure 18. Typical Connection Diagram
ANALOG INPUT STRUCTURE
Figure 19 shows the equivalent circuit of the analog input
structure of the AD7938-6 in differential/pseudo differential
mode. In single-ended mode, VIN is internally tied to AGND.
The four diodes provide ESD protection for the analog inputs.
Care must be taken to ensure that the analog input signals never
exceed the supply rails by more than 300 mV. This causes these
diodes to become forward-biased and start conducting into the
substrate. These diodes can conduct up to 10 mA without
causing irreversible damage to the part.
The C1 capacitors in Figure 19 are typically 4 pF and can
primarily be attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 Ω.
The C2 capacitors are the ADC sampling capacitors and
typically have a capacitance of 45 pF.
For ac applications, removing high frequency components from
the analog input signal is recommended by the use of an RC
low-pass filter on the relevant analog input pins. In applications
where harmonic distortion and signal-to-noise ratio are critical,
the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac
performance of the ADC. This may necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application.
V
R1
C2
VIN+
DD
C1
D
04
75
1-
02
8
R1
C2
VIN–
VDD
C1
D
Figure 19. Equivalent Analog Input Circuit,
Conversion Phase: Switches Open, Track Phase: Switches Closed
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated. The THD increases as the source impedance increases
graph of the THD vs. source impedance with a 50 kHz input
tone for both VDD = 5 V and VDD = 3 V in single-ended mode
and differential mode, respectively.
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