参数资料
型号: AD7942BRMZ-RL7
厂商: Analog Devices Inc
文件页数: 16/24页
文件大小: 0K
描述: IC ADC 14BIT 250KSPS 10-MSOP
标准包装: 1,000
系列: PulSAR®
位数: 14
采样率(每秒): 250k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 1.25mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 带卷 (TR)
输入数目和类型: 1 个伪差分,单极
配用: EVAL-AD7942CB-ND - BOARD EVALUATION FOR AD7942
AD7942
Rev. B | Page 23 of 2
4
APPLICATION HINTS
LAYOUT
Design the PCB that houses the AD7942 so that the analog and
digital sections are separated and confined to certain areas of
the board. The pinout of the AD7942, with all its analog signals
on the left side and all its digital signals on the right side, eases
this task.
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7942 is used as a shield. Fast switching signals, such as
CNV or clocks, should never run near analog signal paths.
Avoid crossover of digital and analog signals.
At least one ground plane should be used. It can be common or
split between the digital and analog sections. In the case of being
split, the ground plane should be joined underneath the AD7942.
The AD7942 voltage reference input, REF, has a dynamic input
impedance and should be decoupled with minimal parasitic
inductances. This is accomplished by placing the reference
decoupling ceramic capacitor close to, and ideally right up
against, the REF and GND pins. Connect these pins with wide,
low impedance traces.
Finally, decouple the power supply of the AD7942, VDD and
VIO, with ceramic capacitors, typically 100 nF, placed close to
the AD7942. Connect the capacitors using short and large
traces to provide low impedance paths and to reduce the effect
of glitches on the power supply lines. An example of layout
following these rules is shown in Figure 42 and Figure 43.
EVALUATING THE PERFORMANCE OF AD7942
Other recommended layouts for the AD7942 are outlined in
the evaluation board for the AD7942 (EVAL-AD7942CBZ). The
evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from a PC via the EVAL-CONTROL BRD3.
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65
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04
2
Figure 42. Layout Example (Top Layer)
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65
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04
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Figure 43. Layout Example (Bottom Layer)
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