参数资料
型号: AD7952BCPZRL
厂商: Analog Devices Inc
文件页数: 3/32页
文件大小: 0K
描述: IC ADC 14BIT DIFF 1MSPS 48LFCSP
标准包装: 2,500
系列: PulSAR®
位数: 14
采样率(每秒): 1M
数据接口: 串行,并联
转换器数目: 1
功率耗散(最大): 260mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
Data Sheet
AD7952
Rev. A | Page 11 of 32
Pin No.
Mnemonic
Type1
Description
37
REF
AI/O
Reference Input/Output. When PDREF/PDBUF = low, the internal reference and buffer are enabled,
producing 5 V on this pin. When PDREF/PDBUF = high, the internal reference and buffer are disabled,
allowing an externally supplied voltage reference up to AVDD volts. Decoupling with at least a 22 μF
capacitor is required with or without the internal reference and buffer. See the Reference Decoupling
section.
38
REFGND
AI
Reference Input Analog Ground. Connected to analog ground plane.
39
IN
AI
Analog Input. Referenced to IN+.
In the 0 V to 5 V input range, IN is between 0 V and VREF V centered about VREF/2. In the 0 V to
10 V range, IN is between 0 V and 2 VREF V centered about VREF.
In the ±5 V and ±10 V ranges, IN is true bipolar up to ±2 VREF V (±5 V range) or ±4 VREF V (±10 V range)
and centered about 0 V.
In all ranges, IN must be driven 180° out of phase with IN+.
40
VCC
P
High Voltage Positive Supply. Normally 7 V to 15 V.
41
VEE
P
High Voltage Negative Supply. Normally 0 V to 15 V (0 V in unipolar ranges).
43
IN+
AI
Analog Input. Referenced to IN.
In the 0 V to 5 V input range, IN+ is between 0 V and VREF V centered about VREF/2. In the 0 V to
10 V range, IN+ is between 0 V and 2 VREF V centered about VREF.
In the ±5 V and ±10 V ranges, IN+ is true bipolar up to ±2 VREF V (±5 V range) or ±4 VREF V (±10 V range)
and centered about 0 V.
In all ranges, IN+ must be driven 180° out of phase with IN.
45
TEMP
AO
Temperature Sensor Analog Output. When the internal reference is enabled (PDREF = PDBUF = low),
this pin outputs a voltage proportional to the temperature of the AD7952. See the Temperature Sensor
section.
46
REFBUFIN
AI
Reference Buffer Input. When using an external reference with the internal reference buffer
(PDBUF = low, PDREF = high), applying 2.5 V on this pin produces 5 V on the REF pin.
47
PDREF
DI
Internal Reference Power-Down Input.
When low, the internal reference is enabled.
When high, the internal reference is powered down, and an external reference must be used.
48
PDBUF
DI
Internal Reference Buffer Power-Down Input.
When low, the buffer is enabled (must be low when using internal reference).
When high, the buffer is powered down.
49
EPAD3
NC
Exposed Pad. The exposed pad is not connected internally. It is recommended that the pad be
soldered to VEE.
1 AI = analog input; AI/O = bidirectional analog; AO = analog output; DI = digital input; DI/O = bidirectional digital; DO = digital output; P = power.
2 In serial configuration mode (SER/PAR = high, HW/SW = low), this input is programmed with the serial configuration register, and this pin is a don’t care. See the
3 LFCSP_VQ package only.
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