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| 型号： | AD8017ARZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/17页 |
| 文件大小： | 0K |
| 描述： | IC AMP GP DUAL LP LDIST 8SOIC |
| 标准包装： | 1,000 |
| 放大器类型： | 通用 |
| 电路数： | 2 |
| 转换速率： | 1600 V/µs |
| -3db带宽： | 160MHz |
| 电流 - 输入偏压： | 16µA |
| 电压 - 输入偏移： | 1800µV |
| 电流 - 电源： | 7mA |
| 电流 - 输出 / 通道： | 270mA |
| 电压 - 电源，单路/双路(±)： | 4.4 V ~ 12 V，±2.2 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 配用： | AD8018ARU-EVAL-ND - BOARD EVAL FOR AD8018 AD8018AR-EVAL-ND - BOARD EVAL FOR AD8018 AD8017AR-EVAL-ND - BOARD EVAL FOR AD8017 |
AD8017
–12–
REV. C
APPLICATIONS
Output Power Characteristics as Applied to ADSL Signals
The AD8017 was designed to provide both relatively high cur-
rent and voltage output capability. TPCs 12 and 15 quantify the
ac load current versus distortion of the device at loads of 100
and 25
at 1 MHz. Using approximately –50 dBc as the worst
case distortion limit, the AD8017 exhibits acceptable linearity
to within approximately 1.4 V of either supply rail (12 V or
± 6 V)
while simultaneously providing 200 mA of load current.
These levels are achieved at only 7 mA of quiescent current for
each amplifier.
ADSL applications require signal line powers of 13 dBm that
can randomly peak to an instantaneous power (or V
× I product)
of 28.5 dBm. This equates to peak-to-rms voltage ratio of 5.3-
to-1. Using a 1:2 transformer in the ADSL circuit illustrated
below and 100
as the line resistance, a peak voltage of 4.2 V
at a peak current of 168 mA will be required from the line driver
output (see Table I). See detailed application below. A higher
turns ratio transformer can be used to reduce the primary out-
put voltage swing of the amplifier (for devices that do not have
the voltage swing, but do have the current drive capability).
However, this requires more than an equivalent increase in
current due to the added I
× R losses from the transformer for
the same receiver power. Generally this will result in added
distortion. Table I below shows the ADSL ac current and volt-
ages required for both a 1:1 and 1:2 transformer turns ratio.
VIN
1k
0.1 F
8
2
3
1
7
5
6
4.7V
VOUT
1:2
12V
1k
0.1 F
169
4
1k
1 F
0.1 F
10 F
12.5
100
AD8017
50
EFFECTIVE
LOAD
Figure 7. Single 12 V Supply ADSL Remote Terminal
Transmitter
Table I. DSL Drive Amplifier Requirements for Various Combinations of Line Power, Line Impedance, and Turn Ratios
Line
Insertion
Line
Turns
Crest
Reflected
Per Amp
Peak Per Amplifier Peak Current
Power
Loss
Load
Ratio
Factor
Impedance
R1 = R2
Voltage
Voltage Output
Output
13 dBm
1 dB
100
1:1
5.3
100
50
1.585 V rms
8.4 V peak
84 mA
13 dBm
1 dB
100
1:2
5.3
25
12.5
0.792 V rms
4.2 V peak
168 mA
Single 12 V Supply ADSL Remote Terminal (RT) Transmitter
For consumer use, it is desirable to create an ADSL modem
that can be a plug-in accessory for a PC. In such an application,
the circuit should dissipate a minimum of power, yet still meet
the ADSL specification.
The circuit in Figure 7 shows a single 12 V supply circuit that
uses the AD8017 as a remote terminal transmitter. This supply
voltage is readily available on the PCI connector of PCs. The
circuit configures each half of the AD8017 as an inverter with a
gain of about six. Both of the amplifier circuits are ac coupled at
both the inputs and the outputs. This makes the dc levels of the
circuit independent of the other dc levels of the signal chain.
The inputs will generally be driven by the output of an active
filter, which has a low output impedance. Thus there will be a
minimum of loading of the source caused by the 169
input
impedance in the pass band. The output will require a 1:2 step-
up transformer to drive a 100
line. The reflected impedance
back to the primary will be 25
. With 25 of series termina-
tion added (12.5
in each output), the effective load that the
differential amplifier outputs will drive is 50
.
The input and output ac coupling provides two high pass cir-
cuits. The inputs are formed by the 0.1
F capacitor and the
169
resistor, which provides a break frequency of about
9.4 kHz. The two 1
F capacitors in the output along with the
50
effective load provides a 6.4 kHz break frequency in the
output side. Both of these circuits want to reject the Plain Old
Telephone System (POTS) band (dc to 4 kHz) while passing
the ADSL upstream band, which starts at about 20 kHz.
The positive inputs must be biased at midsupply, which is nomi-
nally 6 V. This will maintain the maximum dynamic range of
the output in each direction, regardless of the tolerance of the
supply. The inverting configuration was chosen as this requires
a steady dc current from this supply, as opposed to the signal-
dependent current that would be required in a noninverting
configuration. Several options were studied for creating this supply.
A voltage regulator could be used, but there are several disad-
vantages. The first is that this will not track the middle of the
supplies as it will always have an output that is a fixed voltage
from ground. This also requires an additional active component
that will impact the cost of the total solution.
A two-resistor divider could also be used. There is a tradeoff
required here in the selection of the value of the resistors. As the
resistors become smaller, the amount of power that they will
dissipate will increase. For two 1 k
resistors, the power dissi-
pation in this circuit would be 72 mW. Thus, in order to keep
this power to a minimum, it is desirable to make the resistors as
large as possible.
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