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| 型号： | AD8139ACPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/25页 |
| 文件大小： | 0K |
| 描述： | IC AMP DIFF R-R LN LDIST 8LFCSP |
| 标准包装： | 1 |
| 放大器类型： | 差分 |
| 电路数： | 1 |
| 输出类型： | 差分，满摆幅 |
| 转换速率： | 800 V/µs |
| -3db带宽： | 410MHz |
| 电流 - 输入偏压： | 2.25µA |
| 电压 - 输入偏移： | 150µV |
| 电流 - 电源： | 24.5mA |
| 电流 - 输出 / 通道： | 100mA |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 12 V，±2.25 V ~ 6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VFDFN 裸露焊盘，CSP |
| 供应商设备封装： | 8-LFCSP-VD（3x3） |
| 包装： | 标准包装 |
| 产品目录页面： | 770 (CN2011-ZH PDF) |
| 其它名称： | AD8139ACPZ-REEL7DKR |
AD8139
Rev. B | Page 21 of 24
One way to avoid the input common-mode swing limitation is
to bias VIN and VREF at midsupply. In this case, VIN is 5 V p-p
swinging about a baseline at 2.5 V, and VREF is connected to a
low-Z 2.5 V source. VICM now has an amplitude of 2.5 V p-p and
is swinging about 2.5 V. Using the results in Equation 17, VACM
is calculated to be equal to VICM because VOCM = VICM. Therefore,
VACM swings from 1.25 V to 3.75 V, which is well within the
input common-mode voltage limits of the AD8139. Another
benefit seen in this example is that because VOCM = VACM = VICM
no wasted common-mode current flows. Figure 62 illustrates
how to provide the low-Z bias voltage. For situations that do not
require a precise reference, a simple voltage divider suffices to
develop the input voltage to the buffer.
VIN
0V TO 5V
AD8139
+
–
8
2
1
6
3
4
5
VOCM
200
324
5V
200
324
0.1F
10F
+
AD8031
+
–
0.1F
5V
ADR431
2.5V
REFERENCE
TO AD7674 REFBUFIN
046
79
-0
53
Figure 62. Low-Z 2.5 V Buffer
Another way to avoid the input common-mode swing limitation is
to use dual power supplies on the AD8139. In this case, the
biasing circuitry is not required.
Bandwidth vs. Closed-Loop Gain
The 3 dB bandwidth of the AD8139 decreases proportionally
to increasing closed-loop gain in the same way as a traditional
voltage feedback operational amplifier. For closed-loop gains
greater than 4, the bandwidth obtained for a specific gain can be
estimated as
)
MHz
300
(
,
dB
3
,
×
+
=
F
G
dm
OUT
R
V
f
(20)
or equivalently, β(300 MHz).
This estimate assumes a minimum 90° phase margin for the
amplifier loop, which is a condition approached for gains greater
than 4. Lower gains show more bandwidth than predicted by
the equation due to the peaking produced by the lower
phase margin.
Estimating DC Errors
Primary differential output offset errors in the AD8139 are due
to three major components: the input offset voltage, the offset
between the VAN and VAP input currents interacting with the
feedback network resistances, and the offset produced by the dc
voltage difference between the input and output common-mode
voltages in conjunction with matching errors in the feedback
network.
The first output error component is calculated as
+
=
G
F
IO
R
V
e1
Vo _
, or equivalently as VIO/β
(21)
where VIO is the input offset voltage. The input offset voltage of the
AD8139 is laser trimmed and guaranteed to be less than 500 μV.
The second error is calculated as
()
F
IO
G
F
G
F
IO
R
I
R
I
e2
Vo
=
+
+
=
_
(22)
where IIO is defined as the offset between the two input bias
currents.
The third error voltage is calculated as
Vo_e3 = Δenr × (VICM VOCM)
(23)
where Δenr is the fractional mismatch between the two
feedback resistors.
The total differential offset error is the sum of these three error
sources.
Other Impact of Mismatches in the Feedback Networks
The internal common-mode feedback network still forces the
output voltages to remain balanced, even when the RF/RG feedback
networks are mismatched. However, the mismatch will cause a
gain error proportional to the feedback network mismatch.
Ratio-matching errors in the external resistors degrade the
ability to reject common-mode signals at the VAN and VIN input
terminals, much the same as with a four-resistor difference
amplifier made from a conventional op amp. Ratio-matching
errors also produce a differential output component that is
equal to the VOCM input voltage times the difference between the
feedback factors (βs). In most applications using 1% resistors,
this component amounts to a differential dc offset at the output
that is small enough to be ignored.
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| AD8139AR | 制造商:Analog Devices 功能描述: |
| AD8139ARD | 功能描述:IC AMP DIFF R-R LN LDIST 8SOIC RoHS:否 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:2,500 系列:Excalibur™ 放大器类型:J-FET 电路数:1 输出类型:- 转换速率:45 V/µs 增益带宽积:10MHz -3db带宽:- 电流 - 输入偏压:20pA 电压 - 输入偏移:490µV 电流 - 电源:1.7mA 电流 - 输出 / 通道:48mA 电压 - 电源，单路/双路(±):4.5 V ~ 38 V，±2.25 V ~ 19 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
| AD8139ARD-EBZ | 功能描述:BOARD EVAL FOR AD8139ARD RoHS:是 类别:编程器，开发系统 >> 评估板 - 运算放大器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- |
| AD8139ARD-REEL | 功能描述:IC AMP DIFF R-R LN LDIST 8SOIC RoHS:否 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:50 系列:- 放大器类型:J-FET 电路数:2 输出类型:- 转换速率:3.5 V/µs 增益带宽积:1MHz -3db带宽:- 电流 - 输入偏压:30pA 电压 - 输入偏移:2000µV 电流 - 电源:200µA 电流 - 输出 / 通道:- 电压 - 电源，单路/双路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:8-DIP（0.300"，7.62mm） 供应商设备封装:8-PDIP 包装:管件 |
| AD8139ARD-REEL7 | 制造商:Analog Devices 功能描述:SP Amp DIFF AMP Single R-R O/P 制造商:Analog Devices 功能描述:SP Amp DIFF AMP Single R-R O/P ±6V/12V 8-Pin SOIC N EP T/R |
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