参数资料
| 型号： | AD8142ACPZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/24页 |
| 文件大小： | 0K |
| 描述： | IC VIDEO AMP TRPL DIFF 24LFCSP |
| 标准包装： | 5,000 |
| 应用： | 驱动器 |
| 输出类型： | 差分 |
| 电路数： | 3 |
| -3db带宽： | 285MHz |
| 转换速率： | 1250 V/µs |
| 电流 - 电源： | 47mA |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 24-LFCSP-WQ（4x4） |
| 包装： | 带卷 (TR) |
AD8141/AD8142
Data Sheet
Rev. A | Page 20 of 24
AD8142 SIGNAL LEVELS ON VARIOUS SUPPLIES
Figure 44 and Figure 45 illustrate the key video signal levels
seen in typical applications operating on a single +5 V supply
and ±2.5 V supplies; common-mode sync pulses are omitted
from the circuit drawing for clarity but are shown in a separate
waveform drawing of the signals directly at the AD8142 outputs,
shown just below the associated circuit drawing. The sync pulses
are common-mode, that is, they move in the same direction on
each output polarity. In Figure 44 and Figure 45, this means that
the HSYNC pulses are either both green or both blue for the red
and black video signals.
DISABLE FEATURE
When asserted, the disable feature minimizes quiescent current
consumption and provides a high-Z output. It offers a convenient
means to connect two driver outputs together in parallel to form a
tristate multiplexed application. The disable feature can also be
used to minimize quiescent current drawn when a particular
device is not being used.
The disable pin is a binary input that controls the state of the
with most TTL and CMOS families (see Table 1 for the logic
levels). The AD8141/AD8142output is disabled when the disable
operates in its normal fashion when the disable input is driven to
its low state.
An unavoidable common-mode glitch occurs at the outputs
when switching between disabled and enabled states and vice
versa. The glitch lasts for a few tens of nanoseconds and is
on the order of 2 V or 3 V. If the disable feature is used, it is
recommended that common-mode protection be used on the
receiver (see the AD8143 data sheet for a detailed description of
common-mode protection)
09
46
1-
0
42
AD8142
+
–
49.9
1k
38.3
80.6
0.76V
0.52V
1k
2k
+5V
2k
100
UTP
49.9
0.7V
1.5V
2.2V
1.5V
0.8V
0.7V
0V
75
VIDEO
SOURCE
1.4V
1.5V
0.8V
2.2V
0.5V
AD8142 KEY SIGNAL LEVELS ON SINGLE +5V SUPPLY
AD8142 OUTPUT SIGNAL LEVELS INCLUDING COMMON-MODE HSYNC PULSES
Figure 44. AD8142 Key Signal Levels on Single 5 V Supply; Upper Drawing Shows Schematic, and Lower Drawing Shows Output Signals with HSYNC Pulses
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD8142-EVALZ | 制造商:AD 制造商全称:Analog Devices 功能描述:Low Cost, Triple Differential Drivers |
| AD8143 | 制造商:AD 制造商全称:Analog Devices 功能描述:High Speed, Triple Differential Receiver with Comparators |
| AD8143ACPZ-R2 | 制造商:Analog Devices 功能描述:SP Amp DIFF Receiver Amp Triple 制造商:Analog Devices 功能描述:SP AMP DIFF RCVR AMP TRIPLE 12V/24V 32LFCSP EP - Tape and Reel 制造商:Analog Devices 功能描述:TRIPLE DIFFERENTIAL RECEIVER |
| AD8143ACPZ-REEL | 功能描述:IC RECEIVER TRIPLE DIFF 32LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:27 系列:- 类型:收发器 驱动器/接收器数:3/3 规程:RS232，RS485 电源电压:4.75 V ~ 5.25 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| AD8143ACPZ-REEL7 | 功能描述:IC RECEIVER TRIPLE DIFF 32LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:27 系列:- 类型:收发器 驱动器/接收器数:3/3 规程:RS232，RS485 电源电压:4.75 V ~ 5.25 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
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