参数资料
型号: AD8186ARUZ-RL
厂商: Analog Devices Inc
文件页数: 5/20页
文件大小: 0K
描述: IC MULTIPLEXER TRPL 2X1 24TSSOP
标准包装: 2,500
功能: 多路复用器
电路: 3 x 2:1
电压电源: 单电源
电压 - 电源,单路/双路(±): 3.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 带卷 (TR)
REV. A
AD8186/AD8187
–13–
The AD8187
The AD8187 uses on-chip feedback resistors to realize the gain-
of-two function. To provide low crosstalk and a high output
impedance when disabled, each set of 500
feedback resistors is
terminated by a dedicated reference buffer. A reference buffer is
a high speed op amp configured as a unity-gain follower. The
three reference buffers, one for each channel, share a single, high
impedance input, the VREF pin (see Figure 4). VREF input bias
current is typically less than 2
A.
A0
B0
VREF
5V
GBUF 0
5V
GBUF 1
5V
GBUF 2
500
OUT 0
500
VF-1
VF-2
1
VFO
OUT1
OUT2
Figure 4. Conceptual Diagram of a Single
Multiplexer Channel, G = +2
This configuration has a few implications for single-supply
operation:
1) On the AD8187, VREF may not be tied to the most negative
analog supply, VEE.
Limits on Reference Voltage (AD8187, see Figure 5):
VV
V
VV
Von
V /
V Supplies
EE
REF
CC
REF
+<
<
<<
13
16
13
34
0
5
.– .
..
A0
VREF
5V
OUT 0
5V
1.3V
1.6V
1.3V
VOUT
VO_MAX = 3.7V
VO_MAX = 3.4V
VO_MIN = 1.3V
VREF
GND
Figure 5. Output Compliance of Main Amplifier
Channel and Ground Buffer
2) Signal at the VREF pin appears at each output. Therefore,
VREF should be tied to a well bypassed, low impedance source.
Using superposition, it is easily shown that
VV
V
OUT
IN
REF
2–
3) To maximize the output dynamic range, the reference voltage
should be chosen with some care.
For example, consider amplifying a 700 mV video signal with a
sync pulse 300 mV below black level. The user might decide to set
VREF at black level to preferentially run video signals on the faster
NPN transistor path. The AD8186 would, in this case, allow a
reference voltage as low as 1.3 V + 300 mV = 1.6 V. If the AD8187
is used, the sync pulse would be amplified to 600 mV. Therefore,
the lower limit on VREF becomes 1.3 V + 600 mV = 1.9 V. For
routing RGB video, an advantageous configuration would be to
employ +3 V and –2 V supplies, in which case VREF could be
tied to ground.
If system considerations prevent running the multiplexer on split
supplies, a false ground reference should be employed. A low
impedance reference may be synthesized with a second opera-
tional amplifier. Alternately, a well bypassed resistor divider
may serve. Refer to the Application section for further explana-
tion and more examples.
VREF
1 F
5V
GND
OP21
100k
10k
0.022 F
100
1 F
FROM 1992 ADI AMPLIFIER
APPLICATIONS GUIDE
Figure 6a. Synthesis of a False Ground Reference
VREF
1 F
5V
10k
CAP MUST BE LARGE
ENOUGH TO ABSORB
TRANSIENT CURRENTS
WITH MINIMUM BOUNCE.
Figure 6b. Alternate Method for Synthesis of a
False Ground Reference
High Impedance Disable
Both the AD8186 and the AD8187 may have their outputs
disabled to a high impedance state. In the case of the AD8187,
the reference buffers also disable to a state of high output
impedance. This feature prevents the feedback network of a
disabled channel from loading the output, which is valuable
when busing together the outputs of several muxes.
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