参数资料
型号: AD8264-EVALZ
厂商: Analog Devices Inc
文件页数: 29/40页
文件大小: 0K
描述: BOARD EVAL FOR AD8264 VGA
标准包装: 1
每 IC 通道数: 4 - 四
放大器类型: 可变增益
输出类型: 差分
转换速率: 380 V/µs
-3db带宽: 235MHz
工作温度: -40°C ~ 105°C
电流供应(主 IC): 99mA
电压 - 电源,单路/双路(±): ±2.5 V ~ 5 V
板类型: 完全填充
已供物品:
已用 IC / 零件: AD8264
AD8264
Rev. A | Page 35 of 40
+V
IPN1
OPP1
OPP2
IPN2
IPP2
IPP3
IPN3
OPP3
IPP4
CO
M
G
NH4
G
NH3
V
O
CM
VPO
S
VN
EG
OFS
4
IPP1
CO
M
G
NH1
G
NH2
GN
LO
VPO
S
VN
EG
OFS
1
VOL1
VOH1
VOH2
VOL2
VGA2
VGA3
VOL3
VOH3
OPP4
VOH4
IPN4
VOL4
OFS
3
V
G
A4
OFS
2
V
G
A1
–V
OFS12
OFS34
GNLO
VOCM
GN1_2
PIN 0
EXPOSED PADDLE
IN3
OP1_2
12
C23
0.1F
15
20
19
18
17
16
14
13
R17
DNI
R16
DNI
R28
DNI
L3
FB
L4
FB
IN4
11
L1
FB
VPOS
21
30
29
28
27
26
25
24
23
22
VGA2
VGA3
VGA4
VGA1
39
36
31
32
33
34
35
37
38
40
R11
49.9Ω
R10
DNI
+
R9
DNI
OP3_4
10
1
2
3
4
5
6
7
8
9
R19
DNI
R29
DNI
IN2
R73
R23
DNI
R31
DNI
OPP12
OPP34
VO_CM
VOUT_3
VOUT_4
VOUT_2
VOUT_1
OFS_12
GN1_2
GND2 GND3 GND4 GND5 GND6
GND1
+V
–V
IN_4
IN_3
IN_2
OP34
OP12
GN3_4
GN34
VGA_4
VGA3
VGA2
VGA_1
C19
0.1F
C20
0.1F
C34
10F
C33
10F
L2
FB
OPP_3
OPP_4
OPP_2
OPP_1
C24
0.1F
OFS_34
R32
DNI
R49
R86
R47
R48
R51
IN_1
R1
453Ω
IN1
R7
453Ω
R22
DNI
R45
49.9Ω
R46
49.9Ω
R6
453Ω
R25
DNI
R20
DNI
R78
R72
R17
49.9Ω
C22
0.1F
C21
0.1F
R80
R79
R70
R71
R8
453Ω
R64
0
R63
0
R65
0
R66
0
R67
453Ω
R69
453Ω
R57
R58
R56
R55
07736-
088
PIN 0: EXPOSED PADDLE
R24
DNI
Figure 118. AD8264-EVALZ Schematic
The SMA connectors, VGA1 through VGA4, enable signal
monitoring at these nodes, with 453 resistors for protecting
the device. These resistors can be shorted at the discretion of
the user if wide bandwidth is desired. The differential outputs
are provided with 0.1” spacing 2-pin headers, which fit the low
capacitance Tektronix differential scope probe P6045 model.
Note that the gain control input of the AD8264 is differential.
Each channel has its own gain control pin (GNHx); however,
pairs of pins are connected together on the evaluation board
and connected to a test loop. The 2-pin headers are provided for
jumpers to connect the gain pins to ground, preventing the
quiescent gain control voltage at the GNHx pins from floating
high. The low sides of the gain controls for each channel are
internally connected in the AD8264, and a 2-pin header with
jumper is provided to connect this pin (GNLO) to ground as well.
A similar arrangement of 2-pin headers is provided for the output
offset voltage. As shipped, the offset pins are connected to ground,
preventing the pins from floating high.
For connecting to an ADC, remove the jumpers at the OF1_2
and OF3_4 headers and connect the appropriate offset voltage
at the test loops, OF12 and OF34. If the VOCM pin is buffered,
it can be connected to the reference of the ADC.
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