REV. 0
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD8323
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
5 V CATV Line Driver Fine Step
Output Power Control
FUNCTIONAL BLOCK DIAGRAM
DIFF OR
SINGLE
INPUT
AMP
ATTENUATION
CORE
Z
OUT
DIFF =
75
8
8
8
Z
IN
(SINGLE) = 800
Z
IN
(DIFF) = 1.6k
R1
R2
AD8323
DATEN
DATA
CLK
GND (11 PINS)
PD
SLEEP
V
OUT+
V
OUT–
V
CC
(7 PINS)
V
IN+
V
IN–
BUFFER
DECODE
DATA LATCH
SHIFT
REGISTER
POWER-DOWN
LOGIC
POWER
AMP
BYP
FEATURES
Supports DOCSIS Standard for Reverse Path
Transmission
Gain Programmable in 0.75 dB Steps Over a 53.5 dB
Range
Low Distortion at 60 dBmV Output
–56 dBc SFDR at 21 MHz
–55 dBc SFDR at 42 MHz
Output Noise Level
–48 dBmV in 160 kHz
Maintains 75
Output Impedance
Power-Up and Power-Down Condition
Upper Bandwidth: 100 MHz (Full Gain Range)
5 V Supply Operation
Supports SPI Interfaces
APPLICATIONS
Gain-Programmable Line Driver
HFC High-Speed Data Modems
Interactive Set-Top Boxes
PC Plug-in Modems
General-Purpose Digitally Controlled Variable Gain Block
GENERAL DESCRIPTION
The AD8323 is a low-cost, digitally controlled, variable gain ampli-
fier optimized for coaxial line driving applications such as cable
modems that are designed to the MCNS-DOCSIS upstream
standard. An 8-bit serial word determines the desired output gain
over a 53.5 dB range resulting in gain changes of 0.7526 dB/LSB.
The AD8323 comprises a digitally controlled variable attenuator
of 0 dB to –53.5 dB, which is preceded by a low noise, fixed
gain buffer and is followed by a low distortion high power am-
plifier. The AD8323 accepts a differential or single-ended input
signal. The output is specified for driving a 75
load, such as
coaxial cable.
Distortion performance of –56 dBc is achieved with an output
level up to 60 dBmV at 21 MHz bandwidth. A key performance
and cost advantage of the AD8323 results from the ability to main-
tain a constant 75
output impedance during power-up and
power-down conditions. This eliminates the need for external 75
termination, resulting in twice the effective output voltage when
compared to a standard operational amplifier. In addition, this
device has a sleep mode function that reduces the quiescent
current to 4 mA.
The AD8323 is packaged in a low-cost 28-lead TSSOP, operates
from a single 5 V supply, and has an operational temperature
range of –40
°
C to +85
°
C.
GAIN CONTROL
–
DEC Code
–
50
0
D
–
–
55
–
60
–
65
–
70
–
75
8
16
24
32
40
48
56
HD3
HD2
F
O
= 42MHz
P
O
= 60dBmV @ MAX GAIN
64
72
Figure 1. Harmonic Distortion vs. Gain Control