参数资料
型号: AD8347ARU-REEL7
厂商: ANALOG DEVICES INC
元件分类: 衰减器
英文描述: 0.8 GHz-2.7 GHz Direct Conversion Quadrature Demodulator
中文描述: 800 MHz - 2700 MHz RF/MICROWAVE QUADRAPHASE DEMODULATOR
封装: MO-153AE, RU-28, TSSOP-28
文件页数: 15/20页
文件大小: 750K
代理商: AD8347ARU-REEL7
REV. 0
AD8347
–15–
LOIN
LOIP
AD8347
100pF
100pF
200
LO
Figure 5. Single-Ended LO Drive
Operating the VGA
A three-stage VGA sets the gain in the RF section. Two of the
three stages come before the mixer while the third amplifies the
mixer output. All three stages are driven in parallel. The gain
range of the first RF VGA and that of the second RF VGA
combined with the mixer are both –13 dB to +10 dB. The
gain range of the baseband VGA is –4 dB to +19.5 dB. So the
overall gain range from the RF input to the IMXO/QMXO pins
is –30 dB to approximately +39.5 dB.
The gain of the VGA is set by the voltage on the VGIN pin,
which is a high impedance input. The gain control function
(which is linear-in-dB) and linearity are shown in TPC 1 and
TPC 2 at 1.9 GHz. Note that the sense of the gain control
voltage is negative so as the gain control voltage ranges from 0.2 V
to 1.2 V, the gain
decreases
from +39.5 dB to –30 dB.
RFIN
VREF
RFIP
VPS2
IMXO
COM3
IOPP
IOFS
IOPN
VCMO
VPS1
LOIN
IAIN
COM2
QOPN
COM3
VGIN
ENBL
LOIP
COM1
VPS3
AD8347
PHASE
SPLITTER
1
BIAS
CELL
DET 1
VREF
VREF
GAIN
CONTROL
INTERFACE
DET 2
VREF
VCMO
PHASE
SPLITTER
2
VCMO
VDT2
QMXO
QOPP
QOFS
C14
0.1 F
VAGC
VDT1
QAIN
QOPP
QOPN
LO INPUT
8dBm
0.8GHz
2.7GHz
T1
ETC 1-1-13
(M/A-COM)
1
5
3
4
C4
100pF
R17
200
C3
100pF
3.8V p-p
DIFFERENTIAL
V
CM
= 2.5V
C10
100pF
C9
0.1 F
C8
100pF
C7
0.1 F
C6
0.1 F
C5
100pF
RF
INPUT
C2
100pF
C1
100pF
R1
200
120mV p-p
1V BIAS
120mV p-p
1V BIAS
C13
0.1 F
IOPP
IOPN
R20
4k
R19
1k
2.5V
3.8V p-p
DIFFERENTIAL
V
CM
= 2.5V
R21
4k
R22
1k
+V
S
+5V
Figure 6. Adjusting AGC Level to Increase Baseband Amplifier Output Swing
Mixer Output Level and Drive Capability
I & Q channel baseband outputs, IMXO and QMXO are low
impedance outputs (R
OUT
@ 3
) whose bias level is equal to
V
VREF
, the voltage on Pin 14. The achievable output level on
IMXO/QMXO is limited by their current drive capability of
1.5 mA max. This would allow for a 600 mV p-p swing into a
200
load. At lower output levels, IMXO and QMXO can
drive smaller load resistances, subject to the same current limit.
These output stages are not, however, designed to drive 50
loads directly.
Operating the VGA in AGC Mode
While the VGA can be driven by an external source such as a
DAC, the AD8347 has an on-board sum of squares detector
which allows the AD8347 to operate in an automatic leveling
mode. The connections for operating in this mode are shown in
Figure 4. The two mixer outputs are connected to the detector
inputs VDT1 and VDT2. The summed detector output drives
an internal integrator which in turn delivers a gain correction
voltage to the VAGC pin. A 0.1
μ
F capacitor from VAGC to
ground sets the dominant pole of the integrator circuit. VAGC,
which should be connected to VGIN, adjusts gain until an
internal threshold is reached. This threshold corresponds to a level
at the IMXO/QMXO pins of approximately 8.5 mV rms. This
level will change slightly as a function of RF input power (see
TPC 30). For a CW (sine wave) input this corresponds to
相关PDF资料
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AD8348 50-1000 MHz Quadrature Demodulator
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