–3–
REV. B
AD9070
Test
Level
AD9070BR
Min
5962-9756301HXC
Min
Typ
Parameter
Temp
Typ
Max
Max
Units
DYNAMIC PERFORMANCE
5
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
f
IN
= 10.3 MHz
+25
°
C
+25
°
C
V
V
3
4
3
4
ns
ns
+25
°
C
Full
+25
°
C
Full
I
V
I
V
55
57
56
56
55
55
57
55
56
54
dB
dB
dB
dB
f
IN
= 41 MHz
54
54
Signal-to-Noise Ratio (SINAD)
(With Harmonics)
f
IN
= 10.3 MHz
+25
°
C
Full
+25
°
C
Full
I
V
I
V
54
56
55
54
53
54
56
54
54
52
dB
dB
dB
dB
f
IN
= 41 MHz
51
51
Effective Number of Bit
f
IN
= 10.3 MHz
f
IN
= 41 MHz
2nd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 41 MHz
3rd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 41 MHz
Two-Tone Intermod Distortion (IMD)
f
IN
= 10.3 MHz
f
IN
= 41 MHz
+25
°
C
+25
°
C
I
I
8.8
8.3
9.2
8.9
8.8
8.3
9.2
8.9
Bits
Bits
+25
°
C
+25
°
C
I
I
63
58
70
63
63
58
70
63
dBc
dBc
+25
°
C
+25
°
C
I
I
65
57
71
61
65
57
71
61
dBc
dBc
+25
°
C
+25
°
C
V
V
70
60
70
60
dBc
dBc
NOTES
1
Gain error and gain temperature coefficient are based on the ADC only (with a fixed –2.5 V external reference).
2
t
V
and t
PD
are measured from the threshold crossing of the ENCODE input to the 50% levels of the digital outputs. The output ac load during test is 10 pF.
3
Power dissipation is measured under the following conditions: f
S
100 MSPS, analog input is –1 dBfs at 10.3 MHz. Power dissipation does not include the current of
the external ECL pull-down resistors that set the current in the ECL output followers.
4
A change in input offset voltage with respect to a change in V
EE
.
5
SNR/harmonics based on an analog input voltage of –1.0 dBfs referenced to a 1.024 V full-scale input range.
Typical thermal impedance for the R style (SOIC) 28-lead package:
θ
JC
= 23
°
C/W,
θ
CA
= 48
°
C/W,
θ
JA
= 71
°
C/W.
Typical thermal impedance for the DH style (Ceramic DIP) 28-lead package:
θ
JC
= 8
°
C/W,
θ
CA
= 43
°
C/W,
θ
JA
= 51
°
C/W.
Contact DSCC to obtain the latest revision of the 5962-9756301 drawing.
Specifications subject to change without notice.
SAMPLE N
–
1
t
EH
t
EL
1/fs
t
A
t
PD
t
V
SAMPLE N
SAMPLE N+3
SAMPLE N+4
SAMPLE N+2
SAMPLE N+1
DATA N
–
4
DATA N
–
3
DATA N
–
2
DATA N
–
1
DATA N
DATA N+1
AIN
ENCODE
ENCODE
D9
–
D0
Figure 1. Timing Diagram