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| 型号： | AD9212ABCPZRL7-65 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/56页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT SRL 65MSPS 64LFCSP |
| 标准包装： | 750 |
| 位数： | 10 |
| 采样率（每秒）： | 65M |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 8 |
| 功率耗散（最大）： | 833mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 16 个单端，单极；8 个差分，单极 |
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Octal, 10-Bit, 40 MSPS/65 MSPS,
Serial LVDS, 1.8 V ADC
Data Sheet
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006–2011 Analog Devices, Inc. All rights reserved.
FEATURES
8 analog-to-digital converters (ADCs) integrated into 1 package
100 mW ADC power per channel at 65 MSPS
SNR = 60.8 dB (to Nyquist)
ENOB = 9.8 bits
SFDR = 80 dBc (to Nyquist)
Excellent linearity
DNL = ±0.3 LSB (typical); INL = ±0.4 LSB (typical)
Serial LVDS (ANSI-644, default)
Low power, reduced signal option (similar to IEEE 1596.3)
Data and frame clock outputs
325 MHz, full-power analog bandwidth
2 V p-p input voltage range
1.8 V supply operation
Serial port control
Full-chip and individual-channel power-down modes
Flexible bit orientation
Built-in and custom digital test pattern generation
Programmable clock and data alignment
Programmable output resolution
Standby mode
APPLICATIONS
Medical imaging and nondestructive ultrasound
Portable ultrasound and digital beam-forming systems
Quadrature radio receivers
Diversity radio receivers
Tape drives
Optical networking
Test equipment
GENERAL DESCRIPTION
The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an
on-chip sample-and-hold circuit designed for low cost, low power,
small size, and ease of use. Operating at a conversion rate of up to
65 MSPS, it is optimized for outstanding dynamic performance
and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/
CMOS-/LVDS-compatible sample rate clock for full performance
operation. No external reference or driver components are
required for many applications.
The ADC automatically multiplies the sample rate clock for
the appropriate LVDS serial data rate. A data clock (DCO)
for capturing data on the output and a frame clock (FCO) for
signaling a new output byte are provided. Individual channel
power-down is supported and typically consumes less than
2 mW when all channels are disabled.
FUNCTIONAL BLOCK DIAGRAM
05
96
8-
0
01
SERIAL
LVDS
REF
SELECT
AD9212
AGND
VIN – A
VIN + A
VIN – B
VIN + B
VIN – D
VIN + D
VIN – C
VIN + C
SENSE
VREF
AVDD
DRVDD
10
PDWN
REFT
REFB
D – A
D + A
D – B
D + B
D – D
D + D
D – C
D + C
FCO–
FCO+
DCO+
DCO–
CLK+
DRGND
CLK–
SERIAL PORT
INTERFACE
CSB
SCLK/
DTP
SDIO/
ODM
RBIAS
SERIAL
LVDS
SERIAL
LVDS
SERIAL
LVDS
ADC
DATA RATE
MULTIPLIER
0.5V
SERIAL
LVDS
VIN – E
VIN + E
VIN – F
VIN + F
VIN – H
VIN + H
VIN – G
VIN + G
10
D – E
D + E
D – F
D + F
D – H
D + H
D – G
D + G
SERIAL
LVDS
SERIAL
LVDS
SERIAL
LVDS
ADC
Figure 1.
The ADC contains several features designed to maximize
flexibility and minimize system cost, such as programmable
clock and data alignment and programmable digital test pattern
generation. The available digital test patterns include built-in
deterministic and pseudorandom patterns, along with custom user-
defined test patterns entered via the serial port interface (SPI).
The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is
specified over the industrial temperature range of 40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
Small Footprint. Eight ADCs are contained in a small package.
2.
Low Power of 100 mW per Channel at 65 MSPS.
3.
Ease of Use. A data clock output (DCO) operates up to
300 MHz and supports double data rate (DDR) operation.
4.
User Flexibility. SPI control offers a wide range of flexible
features to meet specific system requirements.
5.
Pin-Compatible Family. This includes the AD9222 (12-bit)
and AD9252 (14-bit).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9212BCPZ-40 | 制造商:Analog Devices 功能描述:ADC Octal Pipelined 40Msps 10-bit Serial 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10BIT ADC 40/65MSPS 1.8V SMD 制造商:Analog Devices 功能描述:IC, 10BIT ADC, 40/65MSPS, 1.8V, SMD |
| AD9212BCPZ-65 | 制造商:Analog Devices 功能描述:ADC Octal Pipelined 65Msps 10-bit Serial 64-Pin LFCSP EP |
| AD9212BCPZRL7-40 | 制造商:AD 制造商全称:Analog Devices 功能描述:Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9212BCPZRL7-65 | 制造商:AD 制造商全称:Analog Devices 功能描述:Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9214 | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS 3 V A/D Converter |
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