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| 型号： | AD9280ARSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC CMOS 8BIT 32MSPS 28-SSOP |
| 产品变化通告： | AD9280 Pin Configuration Description Change 21/Apr/2010 |
| 标准包装： | 47 |
| 位数： | 8 |
| 采样率（每秒）： | 32M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 110mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极 |
| 产品目录页面： | 780 (CN2011-ZH PDF) |
AD9280
–23–
GROUNDING AND LAYOUT RULES
As is the case for any high performance device, proper ground-
ing and layout techniques are essential in achieving optimal
performance. The analog and digital grounds on the AD9280
have been separated to optimize the management of return
currents in a system. Grounds should be connected near the
ADC. It is recommended that a printed circuit board (PCB) of
at least four layers, employing a ground plane and power planes,
be used with the AD9280. The use of ground and power planes
offers distinct advantages:
1. The minimization of the loop area encompassed by a signal
and its return path.
2. The minimization of the impedance associated with ground
and power paths.
3. The inherent distributed capacitor formed by the power plane,
PCB insulation and ground plane.
These characteristics result in both a reduction of electro-
magnetic interference (EMI) and an overall improvement in
performance.
It is important to design a layout that prevents noise from cou-
pling onto the input signal. Digital signals should not be run in
parallel with the input signal traces and should be routed away
from the input circuitry. Separate analog and digital grounds
should be joined together directly under the AD9280 in a solid
ground plane. The power and ground return currents must be
carefully managed. A general rule of thumb for mixed signal
layouts dictates that the return currents from digital circuitry
should not pass through critical analog circuitry.
DIGITAL OUTPUTS
Each of the on-chip buffers for the AD9280 output bits
(D0–D7) is powered from the DRVDD supply pins, separate
from AVDD. The output drivers are sized to handle a variety
of logic families while minimizing the amount of glitch energy
generated. In all cases, a fan-out of one is recommended to
keep the capacitive load on the output data bits below the speci-
fied 20 pF level.
For DRVDD = 5 V, the AD9280 output signal swing is com-
patible with both high speed CMOS and TTL logic families.
For TTL, the AD9280 on-chip, output drivers were designed to
support several of the high speed TTL families (F, AS, S). For
applications where the clock rate is below 32 MSPS, other TTL
families may be appropriate. For interfacing with lower voltage
CMOS logic, the AD9280 sustains 32 MSPS operation with
DRVDD = 3 V. In all cases, check your logic family data sheets
for compatibility with the AD9280 Digital Specification table.
THREE-STATE OUTPUTS
The digital outputs of the AD9280 can be placed in a high
impedance state by setting the THREE-STATE pin to HIGH.
This feature is provided to facilitate in-circuit testing or evaluation.
REV. E
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9280ARSZRL | 功能描述:IC ADC 8BIT CMOS 32MSPS 28SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:2,500 系列:- 位数:16 采样率（每秒）:15 数据接口:MICROWIRE?，串行，SPI? 转换器数目:1 功率耗散（最大）:480µW 电压电源:单电源 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:38-WFQFN 裸露焊盘 供应商设备封装:38-QFN（5x7） 包装:带卷 (TR) 输入数目和类型:16 个单端，双极；8 个差分，双极 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
| AD9280-EB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9280 - Bulk |
| AD9280JRS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 8-Bit |
| AD9280JRSRL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 8-Bit |
| AD9281 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Channel 8-Bit Resolution CMOS ADC |
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