参数资料
型号: AD9517-3ABCPZ-RL7
厂商: Analog Devices Inc
文件页数: 14/80页
文件大小: 0K
描述: IC CLOCK GEN 2.0GHZ VCO 48LFCSP
标准包装: 750
类型: 时钟发生器,扇出配送
PLL:
输入: CMOS,LVDS,LVPECL
输出: CMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 1:12
差分 - 输入:输出: 是/是
频率 - 最大: 2.25GHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
Data Sheet
AD9517-3
Rev. E | Page 21 of 80
–140
–145
–150
–155
–160
–165
–170
0.1
1
100
10
P
F
D
P
HAS
E
NO
IS
E
RE
F
E
RRE
D
T
O
P
F
D
I
NP
UT
(d
Bc/
Hz
)
PFD FREQUENCY (MHz)
06427-
013
Figure 13. PFD Phase Noise Referred to PFD Input vs. PFD Frequency
–210
–224
–222
–220
–218
–216
–214
–212
0
2.5
2.0
1.5
1.0
0.5
P
LL
FIGU
R
E
OF
M
E
R
IT
(
dB
c
/H
z
)
SLEW RATE (V/ns)
06427-
136
Figure 14. PLL Figure of Merit (FOM) vs. Slew Rate at REFIN/REFIN
1.9
1.7
1.5
1.3
1.1
0.9
1.7
1.8
1.9
2.0
2.1
2.2
2.3
V
C
O
TU
N
IN
G
V
OLTA
GE
(
V
)
VCO FREQUENCY (GHz)
06427-
138
Figure 15. VCO Tuning Voltage vs. Frequency
(Note that VCO calibration centers the dc tuning voltage
for the PLL setup that is active during calibration.)
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
10
0
CENTER 122.88MHz
SPAN 50MHz
5MHz/DIV
R
EL
A
T
IVE
PO
W
ER
(d
B
)
06427-
137
Figure 16. PFD/CP Spurs; 122.88 MHz; PFD = 15.36 MHz;
LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2.21 GHz
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
10
0
CENTER 122.88MHz
SPAN 1MHz
100kHz/DIV
R
EL
A
T
IVE
PO
W
ER
(d
B
)
06427-
135
Figure 17. Output Spectrum, LVPECL; 122.88 MHz; PFD = 15.36 MHz;
LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2.21 GHz
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
10
0
CENTER 122.88MHz
SPAN 1MHz
100kHz/DIV
R
EL
A
T
IVE
PO
W
ER
(d
B
)
06427-
134
Figure 18. Output Spectrum, LVDS; 122.88 MHz; PFD = 15.36 MHz;
LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2.21 GHz
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