参数资料
型号: AD9517-3ABCPZ-RL7
厂商: Analog Devices Inc
文件页数: 18/80页
文件大小: 0K
描述: IC CLOCK GEN 2.0GHZ VCO 48LFCSP
标准包装: 750
类型: 时钟发生器,扇出配送
PLL:
输入: CMOS,LVDS,LVPECL
输出: CMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 1:12
差分 - 输入:输出: 是/是
频率 - 最大: 2.25GHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
Data Sheet
AD9517-3
Rev. E | Page 25 of 80
–100
–110
–120
–130
–140
–150
–160
10
100M
10M
1M
100k
10k
1k
100
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY (Hz)
06427-
132
Figure 37. Phase Noise (Additive) CMOS at 250 MHz, Divide-by-4
–100
–110
–120
–160
–150
–140
–130
1k
100M
10M
1M
100k
10k
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY (Hz)
06427-
141
Figure 38. Phase Noise (Absolute) Clock Generation; Internal VCO at
1.97 GHz; PFD = 15.36 MHz; LBW = 143 kHz; LVPECL Output = 122.88 MHz
–90
–100
–110
–120
–130
–140
–150
–160
1k
100M
10M
1M
100k
10k
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY (Hz)
06427-
139
Figure 39. Phase Noise (Absolute) Clock Cleanup; Internal VCO at 1.87 GHz;
PFD = 19.44 MHz; LBW = 12.8 kHz; LVPECL Output = 155.52 MHz
–120
–160
–150
–140
–130
1k
100M
10M
1M
100k
10k
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY (Hz)
06427-
140
Figure 40. Phase Noise (Absolute), External VCXO (Toyocom TCO-2112) at
245.76 MHz; PFD = 15.36 MHz; LBW = 250 Hz; LVPECL Output = 245.76 MHz
1000
100
10
1
0.1
0.01
0.1
1
10
100
1000
IN
P
U
T
J
ITTE
R
A
M
P
LITU
D
E
(
U
Ip-
p)
JITTER FREQUENCY (kHz)
06427-
148
OC-48 OBJECTIVE MASK
AD9517
NOTE: 375UI MAX AT 10Hz OFFSET IS THE
MAXIMUM JITTER THAT CAN BE
GENERATED BY THE TEST EQUIPMENT.
FAILURE POINT IS GREATER THAN 375UI.
fOBJ
Figure 41. GR-253 Jitter Tolerance Plot
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