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参数资料
| 型号： | AD9726-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9726 |
| 产品培训模块： | DAC Architectures |
| 设计资源： | AD9726 Eval Brd Schematic AD9726 Eval Brd BOM |
| 标准包装： | 1 |
| 系列： | TxDAC+® |
| DAC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 400M |
| 数据接口： | 并联 |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9726 |
| 相关产品： | AD9726BSVZ-ND - IC DAC 16IT LVDS 400MSPS 80-TQFP AD9726BSVZRL-ND - IC DAC 16IT LVDS 400MSPS 80-TQFP |
AD9726
Rev. B | Page 8 of 24
ABSOLUTE MAXIMUM RATINGS
Table 5.
THERMAL RESISTANCE
Parameter
With Respect to
Rating
DBVDD, AVDD1,
AVDD2
DBGND, AGND1,
AGND2
0.3 V to 3.6 V
DVDD, CLKVDD,
ACVDD, ADVDD
DGND, CLKGND,
ACGND, ADGND
0.3 V to 2.8 V
DBGND, AGND1,
AGND2
DBGND, AGND1,
AGND2
0.3 V to +0.3 V
DGND, CLKGND,
ACGND, ADGND
DGND, CLKGND,
ACGND, ADGND
0.3 V to +0.3 V
REFIO, FSDAJ
AGND1
0.3 V to AVDD1
+ 0.3 V
IOUTA, IOUTB
AGND1
1.0 V to AVDD1
+ 0.3 V
CLK±
CLKGND
0.3 V to CLKVDD
+ 0.3 V
DB[15:0]±,
DCLK_IN±,
DCLK_OUT±
DBGND
0.3 V to DBVDD
+ 0.3 V
CSB, SCLK, SDIO,
SDO, RESET, REXT
DBGND
0.3 V to DBVDD
+ 0.3 V
SDR_EN, SPI_DIS
ADGND
0.3 V to ADVDD
+ 0.3 V
Thermal impedance can be lowered to 23°C/W by soldering the
exposed package pad to an external heat sink (for example, the
internal PCB copper ground plane). However, this is not necessary
for the power dissipation and operating temperature range of
the AD9726.
Table 6. Thermal Resistance
Package Type
θJA
Unit
80-Lead TQFP_EP Package, Thermally Enhanced
32
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
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