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参数资料
| 型号： | AD9767-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9767 |
| 产品培训模块： | DAC Architectures |
| 标准包装： | 1 |
| 系列： | TxDAC+® |
| DAC 的数量： | 2 |
| 位数： | 14 |
| 采样率（每秒）： | 125M |
| 数据接口： | 并联 |
| 设置时间： | 35ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9767 |
| 相关产品： | AD9767ASTZRL-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP AD9767ASTZ-ND - IC DAC 14BIT DUAL 125MSPS 48LQFP |
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Data Sheet
AD9763/AD9765/AD9767
Rev. G | Page 23 of 44
DAC TRANSFER FUNCTION
Both DACs in the AD9763/AD9765/AD9767 provide comple-
mentary current outputs, IOUTA and IOUTB. IOUTA provides a near
full-scale current output (IOUTFS) when all bits are high (that is,
DAC CODE = 1024/4095/16,384 for the AD9763/AD9765/
AD9767, respectively), while IOUTB, the complementary output,
provides no current. The current output appearing at IOUTA and
IOUTB is a function of both the input code and IOUTFS. IOUTA for the
AD9763, AD9765, and AD9767, respectively, can be expressed as
IOUTA = (DAC CODE/1024) × IOUTFS
(1)
IOUTA = (DAC CODE/4096) × IOUTFS
IOUTA = (DAC CODE/16,384) × IOUTFS
IOUTB for the AD9763, AD9765, and AD9767, respectively, can be
expressed as
IOUTB = ((1023 DAC CODE)/1024) × IOUTFS
(2)
IOUTB = ((4095 DAC CODE)/4096) × IOUTFS
IOUTB = ((16,383 DAC CODE)/16,384) × IOUTFS
where DAC CODE = 0 to 1024, 0 to 4095, or 0 to 16,384 (decimal
representation).
IOUTFS is a function of the reference current (IREF). This is nominally
set by a reference voltage (VREFIO) and an external resistor (RSET).
It can be expressed as
IOUTFS = 32 × IREF
(3)
Current section.
The two current outputs typically drive a resistive load directly
or via a transformer. If dc coupling is required, IOUTA and IOUTB
should be directly connected to matching resistive loads (RLOAD)
that are tied to the analog common (ACOM). Note that RLOAD
can represent the equivalent load resistance seen by IOUTA or IOUTB,
as is the case in a doubly terminated 50 Ω or 75 Ω cable. The single-
ended voltage output appearing at the IOUTA and IOUTB nodes is
VOUTA = IOUTA × RLOAD
(5)
VOUTB = IOUTB × RLOAD
(6)
Note that the full-scale value of VOUTA and VOUTB must not
exceed the specified output compliance range to maintain the
specified distortion and linearity performance.
VDIFF = (IOUTA IOUTB) × RLOAD
(7)
Equation 7 highlights some of the advantages of operating the
AD9763/AD9765/AD9767 differentially. First, the differential
operation helps cancel common-mode error sources associated
with IOUTA and IOUTB such as noise, distortion, and dc offsets.
Second, the differential code-dependent current and subsequent
voltage, VDIFF, is twice the value of the single-ended voltage
output (that is, VOUTA or VOUTB), thus providing twice the signal
power to the load.
The gain drift temperature performance for a single-ended
(VOUTA and VOUTB) or differential output (VDIFF) of the
AD9763/AD9765/AD9767 can be enhanced by selecting
temperature tracking resistors for RLOAD and RSET due to their
ratiometric relationship.
ANALOG OUTPUTS
The complementary current outputs, IOUTA and IOUTB, in each
DAC can be configured for single-ended or differential
operation. IOUTA and IOUTB can be converted into complementary
single-ended voltage outputs, VOUTA and VOUTB, via a load
resistor (RLOAD) as described in Equation 5 through Equation 7.
The differential voltage (VDIFF) existing between VOUTA and VOUTB
can be converted to a single-ended voltage via a transformer or
differential amplifier configuration. The ac performance of the
AD9763/AD9765/AD9767 is optimum and specified using a
differential transformer-coupled output in which the voltage
swing at IOUTA and IOUTB is limited to ±0.5 V. If a single-ended
unipolar output is desired, select IOUTA.
The distortion and noise performance of the AD9763/AD9765/
AD9767 can be enhanced when it is configured for differential
operation. The common-mode error sources of both IOUTA and
IOUTB can be significantly reduced by the common-mode rejection
of a transformer or differential amplifier. These common-mode
error sources include even-order distortion products and noise.
The enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed waveform
increases. This is due to the first-order cancellation of various
dynamic common-mode distortion mechanisms, digital feed-
through, and noise.
Performing a differential-to-single-ended conversion via a trans-
former also provides the ability to deliver twice the reconstructed
signal power to the load, assuming no source termination. Because
the output currents of IOUTA and IOUTB are complementary, they
become additive when processed differentially. A properly selected
transformer allows the AD9763/AD9765/AD9767 to provide the
required power and voltage levels to different loads.
The output impedance of IOUTA and IOUTB is determined by the
equivalent parallel combination of the PMOS switches associated
with the current sources and is typically 100 kΩ in parallel with
5 pF. It is also slightly dependent on the output voltage (that is,
VOUTA and VOUTB) due to the nature of a PMOS device. As a result,
maintaining IOUTA and/or IOUTB at a virtual ground via an I-V
op amp configuration results in the optimum dc linearity. Note that
the INL/DNL specifications for the AD9763/AD9765/AD9767 are
measured with IOUTA maintained at a virtual ground via an op amp.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9768 | 制造商:AD 制造商全称:Analog Devices 功能描述:Ultrahigh Speed IC D/A Converter |
| AD9768JD | 制造商:Rochester Electronics LLC 功能描述:AD9768 IC - Bulk |
| AD9768JQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| AD9768SE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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