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参数资料
型号： AD9779A-DPG2-EBZ
厂商： Analog Devices Inc
文件页数： 13/56页
文件大小： 0K
描述： BOARD EVALUATION FOR AD9779A
设计资源： Interfacing ADL5370 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0016)
Interfacing ADL5371 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0017)
Interfacing ADL5372 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0018)
Interfacing ADL5373 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0019)
Interfacing ADL5374 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0020)
Interfacing ADL5375 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0021)
AD9788-79A Eval Brd Schematic
AD9779A-DPG2-EBZ BOM
AD9779A-DPG2-EBZ Gerber Files
标准包装： 1
系列： *
DAC 的数量： 2
位数： 16
采样率（每秒）： 1G
数据接口： 串行
DAC 型： 电流
工作温度： -40°C ~ 85°C
已供物品： *
已用 IC / 零件： AD9779A
AD9776A/AD9778A/AD9779A
Rev. B | Page 20 of 56
–150
–170
0
100
fOUT (MHz)
NS
D
(
d
B
m
/Hz
)
–154
–158
–162
–166
20
40
60
80
fDAC = 800MSPS
fDAC = 400MSPS
fDAC = 200MSPS
06
45
2-
0
27
Figure 30. AD9779A Noise Spectral Density vs. fOUT,
fDAC Over Output Frequency with a Single-Tone Input at 6 dBFS
–55
–90
–85
–80
–75
–70
–65
–60
0
260
240
220
200
180
160
140
120
100
80
60
40
20
fOUT (MHz)
AC
L
R
(
d
B
c)
06
45
2-
3
00
0dBFS, PLL DISABLED
–3dBFS, PLL DISABLED
–6dBFS, PLL DISABLED
0dBFS, PLL ENABLED
Figure 31. AD9779A ACLR for First Adjacent Band W-CDMA,
4× Interpolation, fDATA = 122.88 MSPS,
On-Chip Modulation Translates Baseband Signal to IF
SPAN 50MHz
SWEEP 162.2ms (601 pts)
VBW 300kHz
CENTER 143.88MHz
*RES BW 30kHz
RMS RESULTS
CARRIER POWER
–12.49dBm/
3.84000MHz
FREQ OFFSET
5.000MHz
10.00MHz
15.00MHz
REF BW
3.840MHz
dBc
–76.75
–80.94
–79.95
dBm
–89.23
–93.43
–92.44
LOWER
dBc
–77.42
–80.47
–78.96
dBm
–89.91
–92.96
–91.45
UPPER
REF –25.28dBm
*AVG
log
10dB
PAVG
10
W1 S2
*ATTEN 4dB
EXT REF
0
645
2-
0
31
Figure 32. AD9779A W-CDMA Signal,
4× Interpolation, fDATA = 122.88 MSPS, fDAC/4 Modulation
–55
–90
–85
–80
–75
–70
–65
–60
0
260
240
220
200
180
160
140
120
100
80
60
40
20
fOUT (MHz)
AC
L
R
(
d
Bc)
06
45
2-
3
01
–3dBFS, PLL DISABLED
–6dBFS, PLL DISABLED
0dBFS, PLL ENABLED
0dBFS, PLL DISABLED
Figure 33. AD9779A ACLR for Second Adjacent Band W-CDMA,
4× Interpolation, fDATA = 122.88 MSPS,
On-Chip Modulation Translates Baseband Signal to IF
–55
–90
–85
–80
–75
–70
–65
–60
0
260
240
220
200
180
160
140
120
100
80
60
40
20
fOUT (MHz)
AC
L
R
(
d
Bc)
06
45
2-
3
02
–3dBFS, PLL DISABLED
–6dBFS, PLL DISABLED
0dBFS, PLL ENABLED
0dBFS, PLL DISABLED
Figure 34. AD9779A ACLR for Third Adjacent Band W-CDMA,
4× Interpolation, fDATA = 122.88 MSPS,
On-Chip Modulation Translates Baseband Signal to IF
SPAN 50MHz
SWEEP 162.2ms (601 pts)
VBW 300kHz
CENTER 151.38MHz
*RES BW 30kHz
1 –17.87dBm
2 –20.65dBm
3 –18.26dBm
4 –18.23dBm
TOTAL CARRIER POWER –12.61dBm/15.3600MHz
REF CARRIER POWER –17.87dBm/3.84000MHz
FREQ OFFSET
5.000MHz
10.00MHz
15.00MHz
INTEG BW
3.840MHz
dBc
–67.70
–70.00
–71.65
dBm
–85.57
–97.87
–99.52
LOWER
dBc
–67.70
–69.32
–71.00
dBm
–85.57
–87.19
–88.88
UPPER
REF –30.28dBm
*AVG
log
10dB
PAVG
10
W1 S2
*ATTEN 4dB
EXT REF
06
45
2-
03
2
Figure 35. AD9779A Multicarrier W-CDMA Signal,
4× Interpolation, fDAC = 122.88 MSPS, fDAC/4 Modulation
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