参数资料
型号: AD9835BRUZ-REEL
厂商: Analog Devices Inc
文件页数: 13/28页
文件大小: 0K
描述: IC DDS 10BIT 50MHZ 16-TSSOP
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
标准包装: 2,500
分辨率(位): 10 b
主 fclk: 50MHz
调节字宽(位): 32 b
电源电压: 4.75 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
配用: EVAL-AD9835EBZ-ND - BOARD EVALUATION FOR AD9835
AD9835
Data Sheet
Rev. A | Page 20 of 28
APPLICATIONS INFORMATION
The AD9835 contains functions that make it suitable for
modulation applications. The part can be used to perform
simple modulation such as FSK. More complex modulation
schemes such as GMSK and QPSK can also be implemented
using the AD9835. In an FSK application, the two frequency
registers of the AD9835 are loaded with different values; one
frequency will represent the space frequency while the other
will represent the mark frequency. The digital data stream is fed
to the FSELECT pin, which will cause the AD9835 to modulate
the carrier frequency between the two values.
The AD9835 has four phase registers; this enables the part to
perform PSK. With phase shift keying, the carrier frequency is
phase shifted, the phase being altered by an amount that is
related to the bit stream being input to the modulator. The
presence of four shift registers eases the interaction needed
between the DSP and the AD9835.
The AD9835 is also suitable for signal generator applications.
With its low current consumption, the part is suitable for
applications in which it can be used as a local oscillator.
GROUNDING AND LAYOUT
The printed circuit board that houses the AD9835 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes which can be separated easily. A minimum
etch technique is generally best for ground planes as it gives the
best shielding. Digital and analog ground planes should only be
joined in one place. If the AD9835 is the only device requiring
an AGND to DGND connection, then the ground planes
should be connected at the AGND and DGND pins of the
AD9835. If the AD9835 is in a system where multiple devices
require AGND to DGND connections, the connection should
be made at one point only, a star ground point that should be
established as close as possible to the AD9835.
Avoid running digital lines under the device as these will couple
noise onto the die. The analog ground plane should be allowed
to run under the AD9835 to avoid noise coupling. The power
supply lines to the AD9835 should use as large a track as is
possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Fast switching signals such
as clocks should be shielded with digital ground to avoid
radiating noise to other sections of the board. Avoid crossover
of digital and analog signals. Traces on opposite sides of the
board should run at right angles to each other. This will reduce
the effects of feedthrough through the board. A microstrip
technique is by far the best but is not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to ground planes while signals are placed
on the other side.
Good decoupling is important. The analog and digital supplies
to the AD9835 are independent and separately pinned out to
minimize coupling between analog and digital sections of the
device. All analog and digital supplies should be decoupled to
AGND and DGND respectively with 0.1 mF ceramic capacitors
in parallel with 10 mF tantalum capacitors. To achieve the best
from the decoupling capacitors, they should be placed as close
as possible to the device, ideally right up against the device. In
systems where a common supply is used to drive both the
AVDD and DVDD of the AD9835, it is recommended that the
system’s AVDD supply be used. This supply should have the
recommended analog supply decoupling between the AVDD
pins of the AD9835 and AGND and the recommended digital
supply decoupling capacitors between the DVDD pins and DGND.
INTERFACING THE AD9835 TO
MICROPROCESSORS
The AD9835 has a standard serial interface that allows the part
to interface directly with several microprocessors. The device
uses an external serial clock to write the data/control information
into the device. The serial clock can have a frequency of 20 MHz
maximum. The serial clock can be continuous or it can idle
high or low between write operations. When data/ control
information is being written to the AD9835, FSYNC is taken
low and held low while the 16 bits of data are being written into
the AD9835. The FSYNC signal frames the 16 bits of information
being loaded into the AD9835.
AD9835-TO-ADSP-21XX INTERFACE
Figure 26 shows the serial interface between the AD9835 and
the ADSP-21xx. The ADSP-21xx should be set up to operate in
the SPORT Transmit Alternate Framing Mode (TFSW = 1). The
ADSP-21xx is programmed through the SPORT control register
and should be configured as follows: Internal clock operation
(ISCLK = 1), Active low framing (INVTFS = 1), 16-bit word
length (SLEN = 15), Internal frame sync signal (ITFS = 1),
Generate a frame sync for each write operation (TFSR = 1).
Transmission is initiated by writing a word to the Tx register
after the SPORT has been enabled. The data is clocked out on
each rising edge of the serial clock and clocked into the AD9835
on the SCLK falling edge.
AD9835*
FSYNC
SDATA
SCLK
ADSP-2101/
ADSP-2103*
TFS
DT
SCLK
*ADDITIONAL PINS OMITTED FOR CLARITY.
09
63
0-
0
28
Figure 26. ADSP-2101/ADSP-2103 to AD9835 Interface
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