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参数资料
| 型号： | AD9878 |
| 厂商： | Analog Devices, Inc. |
| 元件分类： | 开关 |
| 英文描述： | Mixed-Signal Front End for Broadband Applications |
| 中文描述： | 混合信号的宽带应用前端 |
| 文件页数： | 30/36页 |
| 文件大小： | 749K |
| 代理商： | AD9878 |
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AD9878
PCB DESIGN CONSIDERATIONS
Although the AD9878 is a mixed-signal device, the part should be
treated as an analog component. The on-chip digital circuitry is
designed to minimize the impact of digital switching noise on the
operation of the analog circuits. Following the recommendations
in this section helps achieve the best performance from the MxFE.
Rev. A | Page 30 of 36
COMPONENT PLACEMENT
The following guidelines for component placement are
recommended to achieve optimal performance:
Manage the path of return currents to ensure that high
frequency switching currents from the digital circuits do not
flow into the ground plane under the MxFE or analog circuits.
Keep noisy digital signal paths and sensitive receive signal
paths as short as possible.
Keep digital (noise-generating) and analog (noise-susceptible)
circuits as far apart as possible.
To best manage the return currents, pure digital circuits that
generate high switching currents should be closest to the power
supply entry. This keeps the highest frequency return current
paths short and prevents them from traveling over the sensitive
MxFE and analog portions of the ground plane. Also, these
circuits should be generously bypassed at each device to further
reduce high frequency ground currents. The MxFE should be
placed adjacent to the digital circuits, such that the ground return
currents from the digital sections do not flow into the ground
plane under the MxFE. The analog circuits should be placed
furthest from the power supply. The AD9878 has several pins that
are used to decouple sensitive internal nodes: REFIO, REFB12A,
REFT12A, REFB12B, REFT12B, REFB10, and REFT10. The
decoupling capacitors connected to these points should have low
ESR and ESL, be placed as close as possible to the MxFE, and be
connected directly to the analog ground plane. The resistor
connected to the FSADJ pin and the RC network connected to
the PLLFILT pin should also be placed close to the device and
connected directly to the analog ground plane.
POWER PLANES AND DECOUPLING
The AD9878 evaluation board (Figure 38 and Figure 39)
demonstrates a good power supply distribution and decoupling
strategy. The board has four layers: two signal layers, one ground
plane, and one power plane. The power plane is split into a 3-V
DD
section that is used for the 3 V digital logic circuits, a DVDD
section that is used to supply the digital supply pins of the
AD9878, an AVDD section that is used to supply the analog
supply pins of the AD9878, and a VANLG section that supplies
the higher voltage analog components on the board. The 3-V
DD
section typically has the highest frequency currents on the power
plane and should be kept the furthest from the MxFE and analog
sections of the board.
The DVDD portion of the plane carries the current used to power
the digital portion of the MxFE to the device. This should be
treated similarly to the 3-V
DD
power plane and be kept from going
underneath the MxFE or analog components. The MxFE should
largely sit above the AVDD portion of the power plane. The
AVDD and DVDD power planes can be fed from the same low
noise voltage source; however, they should be decoupled from
each other to prevent the noise generated in the DVDD portion
of the MxFE from corrupting the AVDD supply. This can be done
by using ferrite beads between the voltage source and DVDD, and
between the source and AVDD. Both DVDD and AVDD should
have a low ESR, bulk-decoupling capacitor on the MxFE side of
the ferrite as well as low ESR- and ESL-decoupling capacitors on
each supply pin (for example, the AD9878 requires 17 power
supply decoupling capacitors). The decoupling capacitors should
be placed as close as possible to the MxFE supply pins. An
example of proper decoupling is shown in the AD9878 evaluation
board’s two-page schematic (Figure 38 and Figure 39).
GROUND PLANES
In general, if the component placing guidelines discussed earlier
can be implemented, it is best to have at least one continuous
ground plane for the entire board. All ground connections should
be as short as possible. This results in the lowest impedance return
paths and the quietest ground connections. If the components
cannot be placed in a manner that keeps the high frequency
ground currents from traversing under the MxFE and analog
components, it might be necessary to put current-steering
channels into the ground plane to route the high frequency
currents around these sensitive areas. These current-steering
channels should be used only when and where necessary.
SIGNAL ROUTING
The digital Rx and Tx signal paths should be as short as possible.
Also, these traces should have a controlled impedance of about
50 . This prevents poor signal integrity and the high currents
that can occur during undershoot or overshoot caused by ringing.
If the signal traces cannot be kept shorter than about 1.5 inches,
then series termination resistors (33 to 47 ) should be placed
close to all signal sources. It is a good idea to series terminate all
clock signals at their source, regardless of trace length. The receive
signals are the most sensitive signals on the evaluation board.
Careful routing of these signals is essential for good receive path
performance. The IF+/IF signals form a differential pair and
should be routed together. By keeping the traces adjacent to each
other, noise coupled onto the signals appears as common mode
and is largely rejected by the MxFE receive input. Keeping the
driving point impedance of the receive signal low and placing
any low-pass filtering of the signals close to the MxFE further
reduces the possibility of noise corrupting these signals.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9878-EB | Mixed-Signal Front End for Broadband Applications |
| AD9878BST | Mixed-Signal Front End for Broadband Applications |
| AD9878BSTZ | Mixed-Signal Front End for Broadband Applications |
| ADAV801 | Audio Codec for Recordable DVD |
| ADAV801ASTZ | Audio Codec for Recordable DVD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9878BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 100-Pin LQFP |
| AD9878BSTRL | 制造商:Analog Devices 功能描述:Mixed Signal Front End 100-Pin LQFP T/R 制造商:Analog Devices 功能描述:MIXED SGNL FRONT END 100LQFP - Tape and Reel |
| AD9878BSTZ | 功能描述:IC FRONT-END MIXED-SGNL 100-LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率（瓦特）:- 电压 - 电源，模拟:3 V ~ 3.6 V 电压 - 电源，数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:带卷 (TR) |
| AD9878-EB | 制造商:Analog Devices 功能描述:EVAL KIT FOR MIXED-SGNL FRONT END FOR BROADBAND APPLICATIONS - Bulk |
| AD9879 | 制造商:AD 制造商全称:Analog Devices 功能描述:Mixed-Signal Front End Set-Top Box, Cable Modem |
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