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| 型号： | AD9984AKSTZ-170 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/44页 |
| 文件大小： | 0K |
| 描述： | IC DISPLAY 10BIT 170MSPS 80LQFP |
| 标准包装： | 1 |
| 类型： | 接口 |
| 应用： | 显示器，处理，电视 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 托盘 |
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AD9984A
Rev. 0 | Page 11 of 44
THEORY OF OPERATION
The AD9984A is a fully integrated solution for capturing and
digitizing analog RGB or YPbPr signals for display on advanced
TVs, flat panel monitors, projectors, and other types of digital
displays. Implemented in a high performance CMOS process,
the interface can capture signals with pixel rates up to 170 MHz.
The AD9984A includes all necessary input buffering, signal dc
restoration (clamping), offset and gain (brightness and contrast)
adjustment, pixel clock generation, sampling phase control, and
output data formatting. All controls are programmable via a
2-wire serial interface (I2C). Full integration of these sensitive
analog functions makes system design straightforward and less
sensitive to the physical and electrical environment.
With a typical power dissipation of less than 900 mW and an
operating temperature range of 0°C to 70°C, the device requires
no special environmental considerations.
DIGITAL INPUTS
All digital inputs on the AD9984A operate to 3.3 V CMOS levels.
The following digital inputs are 5 V tolerant (that is, applying
5 V to them does not cause any damage): HSYNC0, HSYNC1,
VSYNC0, VSYNC1, SOGIN0, SOGIN1, SDA, SCL, and CLAMP.
ANALOG INPUT SIGNAL HANDLING
The AD9984A has six, high impedance, analog input pins for
the red, green, and blue channels. They accommodate signals
ranging from 0.5 V to 1.0 V p-p.
Signals are typically brought onto the interface board with a
DVI-I connector, a 15-pin D connector, or RCA connectors.
The AD9984A should be located as close as possible to the
input connector. Signals should be routed using matched-
impedance traces (normally 75 Ω) to the IC input pins.
At the input pins, the signal should be resistively terminated
(75 Ω to the signal ground return) and capacitively coupled to
the AD9984A inputs through 47 nF capacitors. These capacitors
form part of the dc restoration circuit.
In an ideal world of perfectly matched impedances, the best
performance can be obtained with the widest possible signal
bandwidth. The wide bandwidth inputs of the AD9984A
(300 MHz) can track the input signal continuously as it moves
from one pixel level to the next and can digitize the pixel during
a long, flat pixel time. In many systems, however, there are
mismatches, reflections, and noise, which can result in excessive
ringing and distortion of the input waveform. This makes it
more difficult to establish a sampling phase that provides good
image quality. A small inductor in series with the input is shown
to be effective in rolling off the input bandwidth slightly and
providing a high quality signal over a wider range of conditions.
Using a high speed, signal chip, bead inductor (such as the
Fair-Rite 2508051217Z0) in the circuit shown in Figure 4
provides good results in most applications.
RGB
INPUT
RAIN
GAIN
BAIN
75
06476
-00
3
47nF
Figure 4. Analog Input Interface Circuit
HSYNC AND VSYNC INPUTS
The interface also accepts Hsync and Vsync signals, which are
used to generate the pixel clock, clamp timing, and coast and
field information. These can be either a sync signal directly
from the graphics source, or a preprocessed TTL- or CMOS-
level signal.
The Hsync input includes a Schmitt trigger buffer for immunity
to noise and signals with long rise times. In typical PC-based
graphic systems, the sync signals are simply TTL-level drivers
feeding unshielded wires into the monitor cable. As such, no
termination is required.
SERIAL CONTROL PORT
The serial control port is designed for 3.3 V logic; however, it is
tolerant of 5 V logic signals. Refer to the 2-Wire Serial Control
Port section for more information.
OUTPUT SIGNAL HANDLING
The digital outputs operate from 1.8 V to 3.3 V (VDD).
CLAMPING
RGB Clamping
To properly digitize the incoming signal, the dc offset of the
input must be adjusted to fit the range of the on-board ADCs.
Most graphics systems produce RGB signals with black at
ground and white at approximately 0.75 V. However, if sync
signals are embedded in the graphics, the sync tip is often at
ground, black is at 300 mV, and white is at approximately 1.0 V.
Some common RGB line amplifier boxes use emitter-follower
buffers to split signals and increase drive capability. This
introduces a 700 mV dc offset to the signal, which must be
removed for proper capture by the AD9984A.
The key to clamping is to identify a portion (time) of the signal
when the graphic system is known to be producing black. An
offset is then introduced that results in the ADC producing a
black output (Code 0x00) when the known black input is present.
The offset then remains in place when other signal levels are
processed, and the entire signal is shifted to eliminate offset errors.
In most PC graphics systems, black is transmitted between
active video lines. With CRT displays, when the electron beam
has completed writing a horizontal line on the screen (at the
right side), the beam is deflected quickly to the left side of the
screen (called horizontal retrace) and a black signal is provided
to prevent the beam from disturbing the image.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9984APCBZ | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 10-Bit Display Interface |
| AD9984KSTZ-110 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9984KSTZ-140 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9984KSTZ-170 | 制造商:Analog Devices 功能描述: |
| AD9985 | 制造商:AD 制造商全称:Analog Devices 功能描述:110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
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