参数资料
型号: ADA4937-1YCPZ-RL
厂商: Analog Devices Inc
文件页数: 13/29页
文件大小: 0K
描述: IC ADC DIFF DRIVER 16-LFCSP
设计资源: Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051)
标准包装: 5,000
类型: ADC 驱动器
应用: 数据采集
安装类型: 表面贴装
封装/外壳: 16-VFQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-VQ
包装: 带卷 (TR)
Data Sheet
ADA4937-1/ADA4937-2
Rev. D | Page 19 of 28
Similar to the case of a conventional op amp, the output noise
voltage densities can be estimated by multiplying the input-
referred terms at +IN and IN by the appropriate output factor,
where:
2
1
N
β
G
2
is the circuit noise gain.
G1
F1
G1
1
R
β
and
G2
F2
G2
2
R
β
are the feedback factors.
When RF1/RG1 = RF2/RG2, then β1 = β2 = β, and the noise gain
becomes
G
F
N
R
β
G
1
Note that the output noise from VOCM goes to zero in this case.
The total differential output noise density, vnOD, is the root-sum-
square of the individual output noise terms.
8
1
i
2
nOi
nOD
v
IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
As previously mentioned in the Setting the Closed-Loop Gain
section), even if the external feedback networks (RF/RG) are
mismatched, the internal common-mode feedback loop still
forces the outputs to remain balanced. The amplitudes of the
signals at each output remain equal and 180° out of phase. The
input-to-output differential mode gain varies proportionately to
the feedback mismatch, but the output balance is unaffected.
As well as causing a noise contribution from VOCM, ratio matching
errors in the external resistors result in a degradation of the
ability of the circuit to reject input common-mode signals, much
the same as for a four-resistor difference amplifier made from
a conventional op amp.
In addition, if the dc levels of the input and output common-
mode voltages are different, matching errors result in a small
differential-mode output offset voltage. When G = 1, with a
ground referenced input signal and the output common-mode
level set to 2.5 V, an output offset of as much as 25 mV (1%
of the difference in common-mode levels) can result if 1% toler-
ance resistors are used. Resistors of 1% tolerance result in a
worst-case input CMRR of approximately 40 dB, a worst-case
differential-mode output offset of 25 mV due to 2.5 V level
shift, and no significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE FOR AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
in Figure 54, the input impedance (RIN, dm) between the inputs
(+DIN and DIN) is simply RIN, dm = 2 × RG.
+VS
ADA4937
+IN
–IN
RF
+DIN
–DIN
VOCM
RG
VOUT, dm
06
59
1-
051
Figure 54. ADA4937-x Configured for Balanced (Differential) Inputs
For an unbalanced, single-ended input signal (see Figure 55),
the input impedance is
F
G
F
G
cm
IN
R
2
1
,
RT
RS
ADA4937
+VS
RF
RG
RS
RG
RF
VOCM
RT
VOUT, dm
06
59
1-
05
2
Figure 55. ADA4937-x Configured for Unbalanced (Single-Ended) Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the Input Gain Resistor RG.
Terminating a Single-Ended Input
This section explains how to properly terminate a single-ended
input to the ADA4937-x. Using a simple example with an input
source of 2 V and a source resistor of 50 Ω, four simple steps
must be followed.
1.
The input impedance must be calculated using the formula
Ω
267
)
200
(
2
200
1
200
)
(
2
1
F
G
F
G
IN
R
06
59
1-
08
1
ADA4937
RL
VO
+VS
–VS
RS
50
RG
200
RG
200
RF
200
RF
200
VOCM
VS
2V
RIN
267
Figure 56. Single-Ended Input Impedance RIN
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