参数资料
型号: ADAV801
厂商: Analog Devices, Inc.
元件分类: Codec
英文描述: Audio Codec for Recordable DVD
中文描述: 音频编解码器可刻录DVD
文件页数: 20/56页
文件大小: 1405K
代理商: ADAV801
ADAV801
The
hold frequency response:
Rev. 0 | Page 20 of 56
mputed from the zero-order
×
F
/
f
S_INTERP
)/(×
F
/
f
S_INTERP
)
Hardware Model
The output rate of the low-pass filter in Figure 30 is the
interpolation rate:
2
20
× 192,000 kHz = 201.3 GHz
Sampling at a rate of 201.3 GHz is clearly impractical, not to
mention the number of taps required to calculate each
interpolated sample. However, because interpolation by 2
20
involves zero-stuffing 2
20
1 samples between each f
S_IN
sample,
most of the multiplies in the low-pass FIR filter are by zero. A
further reduction can be realized, because only one interpolated
sample is taken at the output at the f
S_OUT
rate, so only one
convolution needs to be performed per f
S_OUT
period instead of
2
20
convolutions. A 64-tap FIR filter for each f
S_OUT
sample is
sufficient to suppress the images caused by the interpolation.
One difficulty with the above approach is that the correct
interpolated sample must be selected upon the arrival of
Because th
ere are 2
20
possible convolutions per f
S_OUT
p
arrival of the f
S_OUT
clock must be measured with an accuracy of
1/201.3 GHz = 4.96 ps. Measuring the f
S_OUT
period with a clock
of 201.3 GHz frequency is clearly impossible; instead, several
coarse measurements of the f
S_OUT
clock period are made and
averaged over time.
UT
.
eriod, the
lyphase
26
,
e
aled. As the input sample rate rises over
the output sample rate, the antialiasing filter’s cutoff frequency
y
’s FIFO block adjusts the
left and right input samples and ores them for the FIR filter’s
c
to the FIFO blo
ck and the ramp input to the digita
The ROM stores the coefficients for the FIR filter convolu
and performs a high order interpolation between the stored
coefficients. The sample rate ratio block measures the sample
rate for dynamically altering the ROM coefficients and sc
of the FIR filter length as well as the input data. The digi
servo loop automatically tracks the f
S_IN
and f
S_OUT
sample rates
and provides the RAM and ROM start addresses for the start of
the FIR filter convolution.
l servo loop.
tion
aling
tal
worst-case images can be co
maximum image
= sin (
where:
F
is the frequency of the worst-case image that would be
2
20
×
f
S_IN
±
f
S_IN
/2.
f
S_INTERP
is
f
S_IN
× 2
20
.
The following worst-case images would appear for
f
S_IN
equal to
192 kHz:
Image at f
S_INTERP
96 kHz = 125.1 dB
Image at f
S_INTERP
+
96 kHz = 125.1 dB
f
S_O
Another difficulty with the above approach is the number of
coefficients required. Because there are 2
20
possible convolu-
tions with a 64-tap FIR filter, there must be 2
20
po
coefficients for each tap, which requires a total of 2 coeffi-
cients. To reduce the number of coefficients in ROM, the SRC
stores a small subset of coefficients and performs a high order
interpolation between the stored coefficients.
The above approach works when f
S_OUT
> f
S_IN
. However, when
the output sample rate, f
S_OUT
, is less than the input sample rate
f
S_IN
, the ROM starting address, input data, and length of th
convolution must be sc
must be lowered, because the Nyquist frequency of the output
samples is less than the Nyquist frequency of the input samples.
To move the cutoff frequency of the antialiasing filter, the
coefficients are dynamically altered and the length of the
convolution is increased by a factor of (f
S_IN
/f
S_OUT
).
This technique is supported by the Fourier transform propert
that, if f(t) is F(ω), then f(k × t) is F(ω/k). Thus, the range of
decimation is limited by the size of the RAM.
SRC Architecture
The architecture of the sample rate converter is shown in
Figure 32. The sample rate converter
st
onvolution cycle. The f
S_IN
counter provides the write address
0
RIGHT DATA IN
LEFT DATA IN
FIFO
ROM A
ROM B
DIGITAL
SERVO LOOP
f
S_IN
COUNTER
ROM C
ROM D
f
S_IN
f
S_OUT
SAMPLE RATE RATIO
SAMPLE
RATE RATIO
EXTERNAL
RATIO
INTERP
FIR FILTER
L/R DATA OUT
HIGH
ORDER
Figure 32. Architecture of the Sample Rate Converter
The FIFO receives the left and right input data and adjusts the
amplitude of the data for both the soft muting of the sample
rate converter and the scaling of the input data by the sample
rate ratio before storing the samples in the RAM. The input data
is scaled by the sample rate ratio, because, as the FIR filter
length of the convolution increases, so does the amplitude of the
convolution output. To keep the output of the FIR filter from
saturating, the input data is scaled down by multiplying it by
(f
S_OUT
/f
S_IN
) when f
S_OUT
< f
S_IN
. The FIFO also scales the input
data for muting and unmuting of the SRC.
The RAM in the FIFO is 512 words deep for both left and right
channels. An offset to the write address provided by the f
S_IN
counter is added to prevent the RAM read pointer from
overlapping the write address. The minimum offset on the SRC
is 16 samples. However, the group delay and mute-in register
can be used to increase this offset.
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ADAV801ASTZ 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率(位):18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比,标准 ADC / DAC (db):81.5 / 88 动态范围,标准 ADC / DAC (db):82 / 87.5 电压 - 电源,模拟:2.6 V ~ 3.3 V 电压 - 电源,数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP(7x7) 包装:带卷 (TR)
ADAV801ASTZ-REEL 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率(位):18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比,标准 ADC / DAC (db):81.5 / 88 动态范围,标准 ADC / DAC (db):82 / 87.5 电压 - 电源,模拟:2.6 V ~ 3.3 V 电压 - 电源,数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP(7x7) 包装:带卷 (TR)
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