参数资料
型号: ADAV801
厂商: Analog Devices, Inc.
元件分类: Codec
英文描述: Audio Codec for Recordable DVD
中文描述: 音频编解码器可刻录DVD
文件页数: 27/56页
文件大小: 1405K
代理商: ADAV801
ADAV801
Table 15. Transmitter User Bit Buffer Size
TxBCONF0
Buffer Size
0
384 bits with Preamble Z as the start of the block.
1
768 bits with Preamble Z as the start of the block.
Rev. 0 | Page 27 of 56
By using sticky bits and interrupts, the transmit buffers can
notify the host or microcontroller when the first user bit buffer
has been updated and when the second transmit user bit buffer
is full. The sticky bit, TxUBINT, is set when the transmit user bit
buffer has been updated and the second transmit user bit buffer
is ready to accept new user bits. The sticky bit, TxFBINT, is set
whenever the second transmit user bit buffer is full. Any new
writes to this buffer are ignored until the first transmit buffer is
updated. These two bits are located in the interrupt status
register. When the host reads the interrupt status register, these
bits are cleared. Interrupts for the TxUBINT and TxFBINT
sticky bits can be enabled by setting the TxUBMASK and
TxFBMASK bits, respectively, in the interrupt status
mask register.
0
SPDIF 0
0...7
8...15
16...23
SECOND
BUFFER
0...7
8...15
16...23
USER-BIT
BUFFER
ADDRESS = 0x52
ADDRESS = 0x53
TRANSMITTER USER BIT
INDIRECT ADDRESS
REGISTER
TRANSMITTER USER BIT
DATA REGISTER
Figure 49. Transmitter User Bit Buffer
Autobuffering
The ADAV801 SPDIF receiver and transmitter sections have an
autobuffering mode allowing the channel status and user bits to
be copied automatically from the receiver to the transmitter
without user intervention. The channel status and user bits can
be independently selected for autobuffering using the
Auto_CSBits and Auto_UBits bits, respectively, in the autobuffer
register. When the receiver and transmitter are running at the
same sample rate, the transmitted channel status and user bits
are the same as the received channel-status and user bits.
In many systems, however, it is likely that the receiver and
transmitter are not running at the same frequency. When the
transmitter sample rate is higher than receiver sample rate, the
channel status and user bit block is sometimes repeated.
the transmitter sample rate is lower than the receiver sample
te, the channel status and user bit blocks might be dropped.
ecause the first five bytes of the channel status are typically
constant, they can be repeated or dropped with no information
loss. However, if the PRO bit in the channel status is set and the
local sample address code and time-of-day code bytes contain
958-3
sent
or repeating messages. Because zero-stuffing
is allowed between IUs and messages, zeros can be added or
subtracted to preserve the messages. When the transmitter
sample rate is greater than the receiver sample rate, extra zeros
are stuffed between the messages. When the sample rate of the
transmitter is less than the sample rate of the receiver, the zero
stuffed between the messages are subtracted. If there are not
en the m
enough zeros betwe
between IUs are subt
autobuffer register enables the adding or subtracting of zeros
between messages.
Interrupts
The ADAV801 provides interrupt bits to indicate the presence
of certain conditions that require attention. Reading the
interrupt status register allows the user to determine if any of
the interrupts have been asserted. The bits of the interrupt
status register remain high, if set, until the register is read. Two
bits, SRCError and RxError, indicate interrupt conditions in the
sample rate converter and an SPDIF receiver error, respectivel
Both these conditions require a read of the appropriate error
register to determine the exact cause of the inter
s
essages to be subtracted, the zeros
racted as well. The Zero_Stuff_IU bit in the
y.
rupt.
ach interrupt in the interrupt status register has an associated
mask bit in the interrupt status mask register. The interrupt
mask bit must be set for the corresponding interrupt to be
generated. This feature allows the user to determine which
functions should be responded to.
The dual function pin ZEROL/INT can be set to indicate the
presence of no audio data on the left channel or the presence of
an interrupt set in the interrupt status register. As shown in
Table 16, the function of this pin is selected by the INTRPT bit
in DAC Control Register 4.
Table 16. ZEROL/INT Pin Functionality
INTRPT
Pin Functionality
0
Pin functions as a ZEROL flag pin.
1
Pin functions as an interrupt pin.
When
ra
B
information, these bytes might be repeated or dropped, in
which case information can be lost. It is up to the user to
determine how to handle this case.
When the user bits are transmitted according to the IEC60
format, the messages contained in the user bits can still be
without dropping
E
SERIAL DATA PORTS
The ADAV801 contains four flexible serial ports (SPORTs) to
ta transfer to and from the codec. All four SPORTs are
independent and can be configured as master or slave ports. In
slave mode, the xLRCLK and xBCLK signals are inputs to the
serial ports. In master mode, the serial port generates the
xLRCLK and xBCLK signals. The master clock for the SPORT
can be selected from a number of sources, as shown in
Figure 50.
allow da
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ADAV801ASTZ 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率(位):18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比,标准 ADC / DAC (db):81.5 / 88 动态范围,标准 ADC / DAC (db):82 / 87.5 电压 - 电源,模拟:2.6 V ~ 3.3 V 电压 - 电源,数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP(7x7) 包装:带卷 (TR)
ADAV801ASTZ-REEL 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率(位):18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比,标准 ADC / DAC (db):81.5 / 88 动态范围,标准 ADC / DAC (db):82 / 87.5 电压 - 电源,模拟:2.6 V ~ 3.3 V 电压 - 电源,数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP(7x7) 包装:带卷 (TR)
ADAV802AST 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk
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