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| 型号： | ADAV801ASTZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 消费家电 |
| 英文描述： | Audio Codec for Recordable DVD |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO64 |
| 封装： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件页数： | 40/56页 |
| 文件大小： | 1405K |
| 代理商： | ADAV801ASTZ |
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ADAV801
Table 42. Sample Rate Converter Error Ma
Rev. 0 | Page 40 of 56
sk Register
RES
5
ADDRESS = 0011011 (0x1B)
OVRL Mask
OVRR Mask
MUTE_IND M
RES
6
RES
4
RES
3
OVRL Mask
2
sk
E_
RES
7
OVRR Ma
1
MUT
0
IND MASK
Masks the OVRL from generating an interrupt.
0 = OVRL bit does not generate an interrupt.
1 = OVRL bit generates an interrupt.
Masks the OVRR from generating an interrupt.
0 = OVRR bit does not generate an interrupt.
1 = OVRR bit generates an interrupt. Reserved.
Masks the MUTE_IND from generating an
0 = MUTE_IND bit does not generate an interrupt.
1 = MUTE_IND bit generates an interrupt.
ASK
interrupt.
Table 43. Interrupt St
ADDRESS = 0011100 (0x1C)
SRCError
TxCSINT
4
RxCSDIFF
3
RxUBINT
2
RxCSBINT
1
RxERROR
0
atus Register
SRCError
7
TxCSTINT
6
TxUBINT
5
This bit is set, if one of the sample rate converter interrupts is asserted, and the host should immediately read the
gh until the interrupt status register is read.
sample rate converter error register. This bit remains hi
This bit is set, if a write to the transmitter channel status buffer was made while transmitter channel status bits were
fer to the SPDIF transmit buffer.
his bit remains high until the interrupt status register is read.
it buffer has transmitted its block of channel status. This bit remains
This bit is set, if the transmitter channel status b
high until the interrupt status register is read.
This bit is set, if the receiver Channel Status A block is different from the re
TxCSTINT
ceiver Channel Status B clock. This bit
remains high until read, but does not generate an interrupt.
eiver user bit buffer has a new block or message. This bit remains high until the interrupt
This bit is set, if the rec
status register is read.
This b
a new
hannel sta
d when RxBC NF3 =
Rx
Th
hi
This bit
receiver error register. This bit rema
RxCSBIN
it is set, if
BCONF3 = 1.
is set, if one of the AES3/SPDIF receiver interrupts is asserted, and the host should immediately read the
ins high until the interrupt status register is read.
block of c
is bit remains
tus is rea
O
0, or if the
when
gh until the interrupt status register is read.
being copied from the transmitter CS buf
This bit is set, if the SPDIF transmit buffer is empty. T
TxUBINT
TxCSINT
RxCSDIFF
RxUBINT
T
channel status ha changed
RxERROR
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相关代理商/技术参数 |
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|---|---|
| ADAV801ASTZ-REEL | 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 编解码器 系列:- 标准包装:2,500 系列:- 类型:立体声音频 数据接口:串行 分辨率（位）:18 b ADC / DAC 数量:2 / 2 三角积分调变:是 S/N 比，标准 ADC / DAC (db):81.5 / 88 动态范围，标准 ADC / DAC (db):82 / 87.5 电压 - 电源，模拟:2.6 V ~ 3.3 V 电压 - 电源，数字:1.7 V ~ 3.3 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-WFQFN 裸露焊盘 供应商设备封装:48-TQFN-EP（7x7） 包装:带卷 (TR) |
| ADAV802AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
| ADAV802ASTZ | 制造商:Analog Devices 功能描述: |
| ADAV803 | 制造商:AD 制造商全称:Analog Devices 功能描述:Audio Codec for Recordable DVD |
| ADAV803AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
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