参数资料
型号: ADCMP605BCPZ-WP
厂商: Analog Devices Inc
文件页数: 3/16页
文件大小: 0K
描述: IC COMP TTL/CMOS 1CHAN 12LFCSP
标准包装: 50
类型: 带锁销
元件数: 1
输出类型: 补充型,LVDS,满摆幅
电压 - 电源,单路/双路(±): 2.5 V ~ 5.5 V
电压 - 输入偏移(最小值): 5mV @ 3V
电流 - 输入偏压(最小值): 5µA @ 3V
电流 - 输出(标准): 50mA
电流 - 静态(最大值): 3mA
CMRR, PSRR(标准): 50dB CMRR,50dB PSRR
传输延迟(最大): 3ns
磁滞: 100µV
工作温度: -40°C ~ 125°C
封装/外壳: 12-VFQFN 裸露焊盘,CSP
安装类型: 表面贴装
包装: 托盘 - 晶粒
ADCMP604/ADCMP605
Rev. A | Page 11 of 16
COMPARATOR PROPAGATION DELAY
DISPERSION
The ADCMP604/ADCMP605 comparators are designed to
reduce propagation delay dispersion over a wide input overdrive
range of 5 mV to VCCI 1 V. Propagation delay dispersion is the
variation in propagation delay that results from a change in the
degree of overdrive or slew rate (how far or how fast the input
signal is driven past the switching threshold).
Propagation delay dispersion is a specification that becomes
important in high speed, time-critical applications, such as data
communications, automatic test and measurement, and instru-
mentation. It is also important in event-driven applications, such
as pulse spectroscopy, nuclear instrumentation, and medical
imaging. Dispersion is defined as the variation in propagation
delay as the input overdrive conditions are changed (see Figure 17
The ADCMP604/ADCMP605 dispersion is typically <1.6 ns as
the overdrive varies from 10 mV to 125 mV. This specification
applies to both positive and negative signals because each of
the ADCMP604 and ADCMP605 has substantially equal delays
for positive-going and negative-going inputs and very low
output skews.
Q/Q OUTPUT
INPUT VOLTAGE
500mV OVERDRIVE
10mV OVERDRIVE
DISPERSION
VN ± VOS
05
91
6-
0
16
Figure 17. Propagation Delay—Overdrive Dispersion
Q/Q OUTPUT
INPUT VOLTAGE
10V/ns
1V/ns
DISPERSION
VN ± VOS
05
91
6-
0
17
Figure 18. Propagation Delay—Slew Rate Dispersion
COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often desirable in a
noisy environment, or when the differential input amplitudes
are relatively small or slow moving. The transfer function for a
comparator with hysteresis is shown in Figure 19. As the input
voltage approaches the threshold (0 V, in this example) from
below the threshold region in a positive direction, the comparator
switches from low to high when the input crosses +VH/2. The
new switching threshold becomes VH/2. The comparator remains
in the high state until the threshold, VH/2, is crossed from
below the threshold region in a negative direction. In this manner,
noise or feedback output signals centered on 0 V input cannot
cause the comparator to switch states unless it exceeds the region
bounded by ±VH/2.
OUTPUT
INPUT
0V
VOL
VOH
+VH
2
–VH
2
05
91
6-
0
18
Figure 19. Comparator Hysteresis Transfer Function
The customary technique for introducing hysteresis into a
comparator uses positive feedback from the output back to
the input. One limitation of this approach is that the amount
of hysteresis varies with the output logic levels, resulting in
hysteresis that is not symmetric about the threshold. The
external feedback network can also introduce significant
parasitics that reduce high speed performance and induce
oscillation in some cases.
The ADCMP605 comparator offers a programmable hysteresis
feature that significantly improves accuracy and stability.
Connecting an external pull-down resistor or a current source
from the LE/HYS pin to GND varies the amount of hysteresis
in a predictable and stable manner. Leaving the LE/HYS
pin disconnected or driving it high removes hysteresis. The
maximum hysteresis that can be applied using this pin is
approximately 160 mV. Figure 20 illustrates the amount of
hysteresis applied as a function of external resistor value. Figure 11
illustrates hysteresis as a function of current.
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