参数资料
型号: ADE7166ASTZF8-RL
厂商: Analog Devices Inc
文件页数: 83/152页
文件大小: 0K
描述: IC ENERGY METER 1PHASE 64LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,500
输入阻抗: *
测量误差: *
电压 - 高输入/输出: *
电压 - 低输入/输出: *
电流 - 电源: *
电源电压: *
测量仪表类型: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 带卷 (TR)
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Table 58. Program Control SFR (PCON, Address 0x87)
Bit
7
[6:0]
Mnemonic
SMOD
Reserved
Default
0
0
Description
Double baud rate control.
Reserved. These bits must be kept at 0 for proper operation.
Table 59. Data Pointer Low SFR (DPL, Address 0x82)
Bit
[7:0]
Mnemonic
DPL
Default
0
Description
These bits contain the low byte of the data pointer.
Table 60. Data Pointer High SFR (DPH, Address 0x83)
Bit
[7:0]
Mnemonic
DPH
Default
0
Description
These bits contain the high byte of the data pointer.
Table 61. Data Pointer SFR (DPTR, Address 0x82 and Address 0x83)
Bit
[15:0]
Mnemonic
DP
Default
0
Description
These bits contain the 2-byte address of the data pointer. DPTR is a combination of the DPH and DPL
SFRs.
Table 62. Stack Pointer SFR (SP, Address 0x81)
Bit
[7:0]
Mnemonic
SP
Default
7
Description
These bits contain the eight LSBs of the pointer for the stack.
Table 63. Configuration SFR (CFG, Address 0xAF)
Bit
7
6
Mnemonic
Reserved
EXTEN
Default
1
0
Description
Reserved. This bit should be left set for proper operation.
Enhanced UART enable bit.
EXTEN
Result
0
Standard 8052 UART without enhanced error-checking features.
1
Enhanced UART with enhanced error checking (see the UART Additional
Features section).
5
4
SCPS
MOD38EN
0
0
Synchronous communication selection bit.
SCPS
Result
I 2 C port is selected for control of the shared I 2 C/SPI pins and SFRs.
0
SPI port is selected for control of the shared I 2 C/SPI pins and SFRs.
1
38 kHz modulation enable bit.
MOD38EN
Result
0
38 kHz modulation is disabled.
1
38 kHz modulation is enabled on the pins selected by the MOD38[7:0]
bits in the extended port configuration SFR (EPCFG, Address 0x9F).
[3:2]
Reserved
00
Reserved. These bits should be kept at 0 for proper operation.
[1:0]
XREN1, XREN0
01
XREN[1:0]
Result
XREN1 OR XREN0 = 1
XREN1 AND XREN0 = 0
Enable MOVX instruction to use 256 bytes of extended RAM.
Disable MOVX instruction.
Rev. B | Page 83 of 152
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