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参数资料
| 型号： | ADE7755ARSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 24SSOP |
| 标准包装： | 59 |
| 输入阻抗： | 390 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 3mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 管件 |
| 配用： | EVAL-ADE7755ZEB-ND - BOARD EVALUATION FOR AD7755 |
ADE7755
TRANSFER FUNCTION
Frequency Outputs F1 and F2
The ADE7755 calculates the product of two voltage signals (on
Channel 1 and Channel 2) and then low-pass filters this product
to extract active power information. This active power information
is then converted to a frequency. The frequency information is
If the on-chip reference is used, actual output frequencies may
vary from device to device due to a reference tolerance of ±8%.
Example 2
In this example, with ac voltages of ±470 mV peak applied to
V1 and ±660 mV peak applied to V2, the expected output
frequency is calculated as follows:
output on F1 and F2 in the form of active low pulses. The pulse
rate at these outputs is relatively low, for example, 0.34 Hz
maximum for ac signals with S0 = S1 = 0 (see Table 7). This
Freq =
8 . 06 × 0. 47 × 0 . 66 × 1 × 1 . 7
2 × 2 × 2 . 5 2
= 0 . 34
8 . 06 × V1 × V2 × Gain × f i
means that the frequency at these outputs is generated from
active power information accumulated over a relatively long
time. The result is an output frequency that is proportional to
the average active power. The averaging of the active power
signal is implicit to the digital-to-frequency conversion. The
output frequency or pulse rate is related to the input voltage
signals by the following equation:
Freq =
V REF 2
where:
Freq = output frequency on F1 and F2 (Hz).
V1 = differential rms voltage signal on Channel 1 (volts).
V2 = differential rms voltage signal on Channel 2 (volts).
Gain = 1, 2, 8, or 16, depending on the PGA gain selection
made using logic inputs G0 and G1.
V REF = the reference voltage (2.5 V ± 8%) (volts).
f i = one of the four possible frequencies (f 1 , f 2 , f 3 , or f 4 ) selected
by using the logic inputs S0 and S1, see Table 6.
where:
Gain = 1, G0 = G1 = 0.
f i = f 1 = 1.7 Hz, S0 = S1 = 0.
V1 = rms of 470 mV peak ac = 0.47/√2 V.
V2 = rms of 660 mV peak ac = 0.66/√2 V.
V REF = 2.5 V (nominal reference value).
If the on-chip reference is used, actual output frequencies may
vary from device to device due to a reference tolerance of ±8%.
As can be seen from these two example calculations, the maximum
output frequency for ac inputs is always half that for dc input
signals. Table 7 shows a complete listing of all the maximum
output frequencies.
Table 7. Maximum Output Frequency on F1 and F2
Maximum Frequency Maximum Frequency
S1 S0 for DC Inputs (Hz) for AC Inputs (Hz)
0 0 0.68 0.34
0 1 1.36 0.68
1 0 2.72 1.36
Table 6. f 1 , f 2 , f 3 , and f 4 Frequency Selection
1
1
5.44
2.72
S1
0
0
1
1
S0
0
1
0
1
f 1 , f 2 , f 3 , and f 4 (Hz)
f 1 = 1.7
f 2 = 3.4
f 3 = 6.8
f 4 = 13.6
XTAL/CLKIN 1
3.579 MHz/2 21
3.579 MHz/2 20
3.579 MHz/2 19
3.579 MHz/2 18
Frequency Output CF
The pulse output CF is intended for use during calibration. The
output pulse rate on CF can be up to 2048 times the pulse rate
on F1 and F2. The lower the f i frequency selected (i = 1, 2, 3, or 4),
f 1 , f 2 , f 3 , or f 4 is a binary fraction of the master clock and, therefore, varies if
1
the specified CLKIN frequency is altered.
Example 1
If full-scale differential dc voltages of +470 mV and ?660 mV
are applied to V1 and V2, respectively (470 mV is the maximum
differential voltage that can be connected to Channel 1, and
660 mV is the maximum differential voltage that can be
connected to Channel 2), the expected output frequency
is calculated as follows:
the higher the CF scaling (except for the high frequency mode
SCF = 0, S1 = S0 = 1). Table 8 shows how the two frequencies
are related, depending on the state of the logic inputs, S0, S1,
and SCF. Because of its relatively high pulse rate, the frequency
at CF is proportional to the instantaneous active power. As is
the case with F1 and F2, the frequency is derived from the
output of the low-pass filter after multiplication. However, because
the output frequency is high, this active power information is
accumulated over a much shorter time. Therefore, less averaging is
carried out in the digital-to-frequency conversion. With much
Freq =
8 . 06 × V1 × V2 × Gain × f i
V REF 2
less averaging of the active power signal, the CF output is much
more responsive to power fluctuations (see the signal processing
block diagram in Figure 22).
where:
Gain = 1, G0 = G1 = 0.
f i = f 1 = 1.7 Hz, S0 = S1 = 0.
V1 = +470 mV dc = 0.47 V (rms of dc = dc).
V2 = ?660 mV dc = 0.66 V (rms of dc = |dc|).
V REF = 2.5 V (nominal reference value).
Rev. A | Page 17 of 20
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相关代理商/技术参数 |
参数描述 |
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| ADE7755ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 24SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
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