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参数资料
| 型号： | ADE7759ARSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 33/36页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 20SSOP |
| 标准包装： | 66 |
| 输入阻抗： | 390 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 3mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
| 配用： | EVAL-ADE7759EBZ-ND - BOARD EVALUATION FOR ADE7759 |
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ADE7759
7
6
5
4
3
2
1
0
0
1
0
0
0
0
0
0
ADDR: 04H/RESET: 05H
AEOF
(ACTIVE ENERGY REGISTER OVERFLOW)
RESET
(END OF A HARDWARE OR SOFTWARE RESET)
TEMP
(TEMPERATURE REGISTER READY)
ZX
(ZERO CROSSING DETECTED)
AEHF
(ACTIVE ENERGY REGISTER HALF FULL)
SAG
(LINE VOLTAGE SAG DETECT)
CYCEND
(LINE CYCLE ENERGY ACCUMULATION END)
WSMP
(WAVEFORM SAMPLING)
NOTE: REGISTER CONTENTS SHOW POWER ON DEFAULTS
Figure 49. Interrupt Status Register
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
ADDR: 10H
AEOF
(ACTIVE ENERGY REGISTER OVERFLOW)
NOT USED
TEMP
(TEMPERATURE REGISTER READY)
ZX
(ZERO CROSSING DETECTED)
AEHF
(ACTIVE ENERGY REGISTER HALF FULL)
SAG
(LINE VOLTAGE SAG DETECT)
CYCEND
(END OF LINE CYCLE ENERGY ACCUMULATION)
WSMP
(WAVEFORM SAMPLING)
NOTE: REGISTER CONTENTS SHOW POWER ON DEFAULTS
Figure 50. Interrupt Enable Register
CH1OS Register (08H)
The CH1OS register is an 8-bit, read/write enabled register. The MSB of this register is used to switch on/off the digital integrator in Chan-
nel 1, and Bits 0 to 5 indicate the amount of the offset correction in Channel 1. Table VIII summarizes the function of this register.
Table VIII. CH1OS Register
Bit Location
0 to 5
6
7
Bit Mnemonic
OFFSET
Not Used
INTEGRATOR
Description
The six LSBs of the CH1OS register control the amount of dc offset correction in Channel 1
ADC. The 6-bit offset correction is sign and magnitude coded. Bits 0 to 4 indicate the magnitude
of the offset correction. Bit 5 shows the sign of the offset correction. A 0 in Bit 5 means the offset
correction is positive and a 1 indicates the offset correction is negative.
This bit is unused.
This bit is used to activate the digital integrator on Channel 1. The digital integrator is switched
on by setting this bit. This bit is set to be 1 on default.
CH1OS REGISTER *
7
6
5
4
3
2
1
0
1
0
0
0
0
0
0
0
ADDR: 08H
DIGITAL INTEGRATOR SELECTION
1 = ENABLE
0 = DISABLE
SIGN AND MAGNITUDE CODED
OFFSET CORRECTION BITS
NOT USED
* REGISTER CONTENTS SHOW POWER-ON DEFAULT
Figure 51. CH1OS Register
REV. A
–33 –
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