参数资料
| 型号： | ADG3308BRUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC XLATOR 8CH 1.2-5.5V 20-TSSOP |
| 标准包装： | 75 |
| 逻辑功能： | 变换器，双向 |
| 位数： | 8 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 数据速率： | 50Mbps |
| 通道数： | 8 |
| 输出/通道数目： | 1 |
| 差分 - 输入:输出： | 无/无 |
| 传输延迟（最大）： | 6ns |
| 电源电压： | 1.15 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 管件 |
| 产品目录页面： | 802 (CN2011-ZH PDF) |
Data Sheet
ADG3308/ADG3308-1
Rev. D | Page 15 of 20
TERMINOLOGY
VIHA
Logic input high voltage at Pin A1 to Pin A8.
VILA
Logic input low voltage at Pin A1 to Pin A8.
VOHA
Logic output high voltage at Pin A1 to Pin A8.
VOLA
Logic output low voltage at Pin A1 to Pin A8.
CA
Capacitance measured at Pin A1 to Pin A8 (EN = 0).
ILA, HIGH-Z
Leakage current at Pin A1 to Pin A8 when EN = 0 (high
impedance state at Pin A1 to Pin A8).
VIHY
Logic input high voltage at Pin Y1 to Pin Y8.
VILY
Logic input low voltage at Pin Y1 to Pin Y8.
VOHY
Logic output high voltage at Pin Y1 to Pin Y8.
VOLY
Logic output low voltage at Pin Y1 to Pin Y8.
CY
Capacitance measured at Pin Y1 to Pin Y8 (EN = 0).
ILY, HIGH-Z
Leakage current at Pin Y1 to Pin Y8 when EN = 0 (high
impedance state at Pin Y1 to Pin Y8).
VIHEN
Logic input high voltage at the EN pin.
VILEN
Logic input low voltage at the EN pin.
CEN
Capacitance measured at EN pin.
ILEN
Enable (EN) pin leakage current.
tEN
Three-state enable time for Pin A1 to Pin A8/Pin Y1 to Pin Y8.
tP, A→Y
Propagation delay when translating logic levels in the A→Y
direction.
tR, A→Y
Rise time when translating logic levels in the A→Y direction.
tF, A→Y
Fall time when translating logic levels in the A→Y direction.
DMAX, A→Y
Guaranteed data rate when translating logic levels in the A→Y
direction under the driving and loading conditions specified in
tSKEW, A→Y
Difference between propagation delays on any two channels
when translating logic levels in the A→Y direction.
tPPSKEW, A→Y
Difference in propagation delay between any one channel and
the same channel on a different part (under same driving/
loading conditions) when translating in the A→Y direction.
tP, Y→A
Propagation delay when translating logic levels in the Y→A
direction.
tR, Y→A
Rise time when translating logic levels in the Y→A direction.
tF, Y→A
Fall time when translating logic levels in the Y→A direction.
DMAX, Y→A
Guaranteed data rate when translating logic levels in the Y→A
direction under the driving and loading conditions specified in
tSKEW, Y→A
Difference between propagation delays on any two channels
when translating logic levels in the Y→A direction.
tPPSKEW, Y→A
Difference in propagation delay between any one channel and
the same channel on a different part (under same driving/
loading conditions) when translating in the Y→A direction.
VCCA
VCCA supply voltage.
VCCY
VCCY supply voltage.
ICCA
VCCA supply current.
ICCY
VCCY supply current.
IHIGH-ZA
VCCA supply current during three-state mode (EN = 0).
IHIGH-ZY
VCCY supply current during three-state mode (EN = 0).
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| ADG3308BRUZ-REEL | 功能描述:IC XLATOR 8CH 1.2-5.5V 20TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 变换器 系列:- 产品培训模块:Logic Packages 标准包装:2,500 系列:- 逻辑功能:变换器，双向 位数:2 输入类型:电压 输出类型:电压 数据速率:- 通道数:2 输出/通道数目:1 差分 - 输入:输出:无/无 传输延迟（最大）:1.5ns 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-TSSOP 包装:带卷 (TR) 其它名称:935284857118GTL2002DP/S440-TGTL2002DP/S440-T-ND |
| ADG3308BRUZ-REEL7 | 功能描述:IC XLATOR 8CH 1.2-5.5V 20TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 变换器 系列:- 产品培训模块:Logic Packages 标准包装:2,500 系列:- 逻辑功能:变换器，双向 位数:2 输入类型:电压 输出类型:电压 数据速率:- 通道数:2 输出/通道数目:1 差分 - 输入:输出:无/无 传输延迟（最大）:1.5ns 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-TSSOP 包装:带卷 (TR) 其它名称:935284857118GTL2002DP/S440-TGTL2002DP/S440-T-ND |
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