参数资料
型号: ADM1034ARQZ-REEL
厂商: ANALOG DEVICES INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封装: LEAD FREE, MO-137AB, QSOP-16
文件页数: 17/40页
文件大小: 1318K
代理商: ADM1034ARQZ-REEL
ADM1034
Rev. 0 | Page 24 of 40
Once the THERM limits are exceeded, the fans are boosted to
full speed—that is, as long as the Boost Disable Bit (Bit 1) is not
set in Configuration Register 2 (Address 0x02).
To configure THERM as an input, the user must set the
THERM timer bit (Bit 2) of Configuration Register 1 (Address
0x01) to 1. (It no longer operates as an output.) The ADM1034
can then detect when the THERM input is asserted low. This
may be connected to a trip point temperature sensor or to the
FAN_FAULT PROCHOT output of a CPU. With processor core
voltages reducing all the time, the threshold for the AGTL +
PROCHOT output also reduces down as new processors
become available. The default threshold on the input is the
normal CMOS threshold. However, Pin 8 (FAN_FAULT/REF)
can also be reconfigured as a REF input. This is done by setting
Bit 7 (FAN_FAULT/REF) in Configuration Register 4 (Address
0x04). Connect the processor VCCP to this input to provide a
reference for the THERM input. The resulting THERM
threshold is 0.75×VCCP, which is the correct threshold for an
AGTL+ signal.
The ADM1034 also measures assertion times on the THERM
input as a percentage of a time window. This time window is
programmable in Configuration Register 4 (Address 0x04) by
using Bits <6:4> (THERM % Time Window). Values between
0.25 seconds and 8 seconds are programmable. The assertion
time as a percentage of the time window is stored in the
THERM % On-Time Register (Address 0x4E).
A THERM % limit is also associated with this register. Once the
measured percentage exceeds the percentage limit, the THERM
% Exceeded Bit (Bit 4) in Status Register 2 (Address 0x50) is
asserted and an ALERT is generated, that is, if the mask bit is
not set. If the limit is set to 0x00, an ALERT is generated on the
first assertion. If the limit is set to 0xFF, an ALERT is never
generated. This is because 0xFF corresponds to the THERM
input, which is asserted continuously.
Table 24. THERM % On-Time Window
Code
THERM % On-Time Window
000
0.25 s
001
0.5 s
010
1 s
011
2 s
100
4 s
101
8 s
110
8 s
111
8 s
When THERM is configured as an input only, setting the Enable
THERM Events bits in Configuration Register 4 allows Pin 7 to
operate as an I/O.
The user can configure the THERM pin to be pulled low as an
output whenever the local temperature exceeds the local
THERM limit. To do this, set the Enable Local THERM events
bit (Bit 0) of Configuration Register 4 (Address 0x04).
The user can also configure the THERM pin to be pulled low as
an output whenever the Remote 1 temperature exceeds the
Remote 1 THERM limit. Set the Enable Remote 1 THERM
events bit (Bit 1) of Configuration Register 4 (Address 0x04).
The last option is to configure the THERM pin to be pulled low
as an output whenever the Remote 2 temperature exceeds the
Remote 2 THERM limit. Set the Enable Remote 2 THERM
events bit (Bit 2) of Configuration Register 4 (Address 0x04).
THERM % LIMIT REGISTER
The THERM % limit is programmed to Register 0x19. An
ALERT is generated, if THERM is asserted for longer than the
programmed percentage limit. The limit is programmed as a
percentage of the chosen time window.
THERM % limit register is an 8-bit register.
0x00 = 0%
0xFF = 100%
Therefore, 1 LSB = 0.39%.
Example
If a time window of 8 seconds is chosen, and an ALERT is to be
generated if THERM is asserted for more than 1 second,
program the following value to the limit register:
% Limit = 1/8 × 100 = 12.5%
12.5% / 0.39% = 32d = 0x20 = 0010 0000
An ALERT is generated if the THERM limit is exceeded after
the time window has elapsed, assuming it is not masked.
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