- 您现在的位置：买卖IC网 > PDF目录298814 > ADM1034ARQZ-REEL (ANALOG DEVICES INC) SPECIALTY ANALOG CIRCUIT, PDSO16 PDF资料下载
参数资料
| 型号： | ADM1034ARQZ-REEL |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封装： | LEAD FREE, MO-137AB, QSOP-16 |
| 文件页数： | 4/40页 |
| 文件大小： | 1318K |
| 代理商： | ADM1034ARQZ-REEL |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页
ADM1034
Rev. 0 | Page 12 of 40
SMBus 2.0 FIXED-AND-DISCOVERABLE MODE
The ADM1034 also supports fixed-and-discoverable mode,
which is backwards-compatible with SMBus 1.0 and 1.1. Fixed-
and-discoverable mode supports all the same functionality as
ARP-capable mode, except for assign address—in which case it
powers up with a fixed address and is not changed by the assign
address call. The fixed address is determined by the state of the
LOCATION pin on power-up.
SMBus 2.0 READ AND WRITE OPERATIONS
The master initiates data transfer by establishing a start
condition, defined as a high-to-low transition on the serial data
line (SDA) while the serial clock line (SCL) remains high. This
indicates that an address/data stream is to follow. All slave
peripherals connected to the serial bus respond to the start
condition and shift in the next 8 bits, which consist of a 7-bit
address (MSB first) plus an R/W bit. This last bit determines the
direction of the data transfer (whether data is written to or read
from the slave device).
1.
The peripheral that corresponds to the transmitted address
responds by pulling the data line low during the low period
before the 9th clock pulse, which is known as the
acknowledge bit. All other devices on the bus remain idle
while the selected device waits for data to be read from or
written to it. If the R/W bit is a 0, the master writes to the
slave device. If the R/W bit is a 1, the master reads from it.
2.
Data is sent over the serial bus in sequences of 9 clock
pulses—8 bits of data followed by an acknowledge bit from
the slave device. Transitions on the data line must occur
during the low period of the clock signal and remain stable
during the high period, because a low-to-high transition
when the clock is high may be interpreted as a stop signal.
The number of data bytes that can be transmitted over the
serial bus in a single read or write operation is limited only
by what the master and slave devices can handle.
3.
When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the 10th clock pulse to assert a
stop condition. In read mode, the master device overrides
the acknowledge bit by pulling the data line high during
the low period before the 9th clock pulse. This is known as
no acknowledge. The master takes the data line low during
the low period before the 10th clock pulse, then high
during the 10th clock pulse to assert a stop condition.
It is not possible to mix read and write in one operation,
because the type of operation is determined at the beginning
and cannot be changed without starting a new operation.
To write data to one of the device data registers or to read data
from it, the address pointer register (APR) must be set so that
the correct data register is addressed; then data can be written
into that register or read from it. The first byte of a write
operation always contains an address that is stored in the APR.
If data is to be written to the device, then the write operation
contains a second data byte, which is written to the register
selected by the APR.
As illustrated in Figure 18, the device address is sent over the
bus, followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the APR. The second
data byte is the data to be written to the internal data register.
When reading data from a register there are two possibilities.
If the ADM1034’s APR value is unknown or incorrect, it must
be set to the correct value before data can be read from the
desired data register. To do this, perform a write to the ADM1034
as before, but send only the data byte containing the register.
(See Figure 19.) A read operation is then performed, using the
serial bus address and the R/W bit set to 1, followed by the data
byte read from the data register. (See Figure 20.)
However, if the APR is already at the desired address, data can
be read from the corresponding data register without first
writing to the APR. In this case, Figure 19 can be omitted.
In Figure 18 to Figure 20, the serial bus address is determined
by the state of the LOCATION pin on power-up.
相关PDF资料 |
PDF描述 |
|---|---|
| ADM1811-5AKS-REEL7 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| ADM1815-5AKS-REEL7 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| ADM1815-R23ART-REEL7 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| ADM811ZART-REEL-7 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO4 |
| ADP10 | PIANO DIP SWITCH-10SWITCHES, SPST, MOMENTARY,THROUGH HOLE-STRAIGHT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADM1034ARQZ-REEL7 | 功能描述:IC THERM/FAN SPEED CTRLR 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 热管理 系列:- 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
| ADM1040 | 制造商:AD 制造商全称:Analog Devices 功能描述:Power Supply Monitor ASIC |
| ADM1041 | 制造商:AD 制造商全称:Analog Devices 功能描述:Secondary-Side Controller with Current Share and Housekeeping |
| ADM1041A | 制造商:AD 制造商全称:Analog Devices 功能描述:Secondary-Side Controller with Current Share and Housekeeping |
| ADM1041AARQZ | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。