参数资料
| 型号： | ADM1063ASUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 28/32页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR/SEQUENCER 48-TQFP |
| 标准包装： | 1 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 10 |
| 输出： | 可编程 |
| 电压 - 阀值： | 可调节/可选择 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 托盘 |
| 配用： | EVAL-ADM1063TQEBZ-ND - BOARD EVALUATION FOR ADM1063TQ |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页当前第28页第29页第30页第31页第32页
ADM1063
The master sends a command code telling the slave device to erase
the page. The ADM1063 command code for a page erasure is 0xFE
(1111 1110). Note that for a page erasure to take place, the page
1
S
2
SLAVE
ADDRESS
3
W A
4
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
5
A
6
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
7 8
A P
SLAVE
ADDRESS
address must be given in the previous write word transaction (see
the Write Byte/Word section). In addition, Bit 2 in the UPDCFG
register (Address 0x90) must be set to 1.
1 2 3 4 5 6
COMMAND
S W A BYTE A P
(0xFE)
Figure 40. Setting an EEPROM Address
Because a page consists of 32 bytes, only the three MSBs of
the address low byte are important for page erasure. The
lower five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
operation.
Figure 38. EEPROM Page Erasure
As soon as the ADM1063 receives the command byte, page
erasure begins. The master device can send a stop command as
soon as it sends the command byte. Page erasure takes
approximately 20 ms. If the ADM1063 is accessed before erasure
is complete, it responds with a no acknowledge (NACK).
?
To write a single byte of data to the EEPROM. In this case,
the command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The first data byte is the low
byte of the EEPROM address, and the second data byte is
1 2 3 4 5 6 7 8 9 10
S W A
Write Byte/Word
In a write byte/word operation, the master device sends a
SLAVE
ADDRESS
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
A
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
A DATA A P
command byte and one or two data bytes to the slave device,
as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts an ACK on SDA.
4. The master sends a command code.
5. The slave asserts an ACK on SDA.
Figure 41. Single Byte Write to the EEPROM
Block Write
In a block write operation, the master device writes a block of
data to a slave device. The start address for a block write must
have been set previously. In the ADM1063, a send byte opera-
tion sets a RAM address, and a write byte/word operation sets
an EEPROM address, as follows:
6.
7.
8.
9.
The master sends a data byte.
The slave asserts an ACK on SDA.
The master sends a data byte or asserts a stop condition.
The slave asserts an ACK on SDA.
1.
2.
3.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (low).
The addressed slave device asserts an ACK on SDA.
10. The master asserts a stop condition on SDA to end
the transaction.
In the ADM1063, the write byte/word protocol is used for
three purposes:
4.
5.
6.
The master sends a command code that tells the slave
device to expect a block write. The ADM1063 command
code for a block write is 0xFC (1111 1100).
The slave asserts an ACK on SDA.
The master sends a data byte that tells the slave device how
?
To write a single byte of data to the RAM. In this case, the
command byte is RAM Address 0x00 to RAM Address 0xDF,
many data bytes are being sent. The SMBus specification
allows a maximum of 32 data bytes in a block write.
7.
8.
The slave asserts an ACK on SDA.
The master sends N data bytes.
1
2
3
4
5
6
7 8
9.
The slave asserts an ACK on SDA after each data byte.
S ADDRESS W A
SLAVE
RAM
ADDRESS
(0x00 TO 0xDF)
A DATA A P
10. The master asserts a stop condition on SDA to end
the transaction.
Figure 39. Single Byte Write to the RAM
1
2
3
4
5
6
7
8
9
10
S ADDRESS W A (BLOCK WRITE) A COUNT A
?
To set up a 2-byte EEPROM address for a subsequent
SLAVE COMMAND 0xFC BYTE
DATA
1
A
DATA
2
A
DATA
N
A P
read, write, block read, block write, or page erase. In this
case, the command byte is the high byte of EEPROM
Address 0xF8 to EEPROM Address 0xFB. The only data
byte is the low byte of the EEPROM address, as shown in
Figure 42. Block Write to the EEPROM or RAM
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except when
?
There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF) to avoid writing to
invalid addresses.
Rev. C | Page 28 of 32
相关PDF资料 |
PDF描述 |
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相关代理商/技术参数 |
参数描述 |
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| ADM1063ASUZ-REEL7 | 功能描述:IC SEQUENCER/SUPERVISOR 48TQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
| ADM1064 | 制造商:AD 制造商全称:Analog Devices 功能描述:Super Sequencer with Voltage Readback ADC |
| ADM1064ACP | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP |
| ADM1064ACP-REEL | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
| ADM1064ACP-REEL7 | 制造商:Analog Devices 功能描述:Volt Supervisor Sequencer 2.7V to 5.4V 40-Pin LFCSP EP T/R |
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