参数资料
型号: ADM696AR
厂商: Analog Devices Inc
文件页数: 9/12页
文件大小: 0K
描述: IC SUPERVISOR MPU 100MA 16SOIC
标准包装: 47
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,推挽式
复位: 高有效/低有效
复位超时: 最小为 35 ms
电压 - 阀值: 1.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
ADM696/ADM697
APPLICATIONS INFORMATION
Increasing the Drive Current (ADM696)
If the continuous output current requirements at V OUT exceeds
100 mA or if a lower V CC –V OUT voltage differential is desired,
an external PNP pass transistor may be connected in parallel
This circuit is not entirely foolproof, and it is possible that a
software fault could erroneously 3-state the buffer. This would
then prevent the ADM69x from detecting that the microproces-
sor is no longer operating correctly. In most cases a better
with the internal transistor. The BATT ON output (ADM696)
can directly drive the base of the external transistor.
+7V TO +15V
INPUT
POWER
7805
+5V
V CC
+5V
INPUT
POWER
0.1μF
PNP TRANSISTOR
0.1μF
R1
PFI
1.3V
PFO
R4
TO
μP NMI
V CC
BATT
ON
V OUT
R2
ADM69x
V BATT
(
V H = 1.3V 1+ –– – + –– –
R
(
BATTERY
ADM696
R3
R R
)
2 3
R R (5V – 1.3V)
V L = 1.3V 1+ –– 1 – – –– 1 –––––––––––
R 2 1.3V (R 3 + R 4 )
)
R
(
Figure 14. Increasing the Drive Current
Using a Rechargeable Battery for Backup (ADM696)
If a capacitor or a rechargeable battery is used for backup, then
ASSUMING R < < R THEN
4 3
R 1
HYSTERESIS V H – V L = 5V –– –
2
)
the charging resistor should be connected to V OUT since this
eliminates the discharge path that would exist during power-
down if the resistor is connected to V CC .
Figure 16. Adding Hysteresis to the Power Fail Comparator
method is to extend the watchdog period rather than disabling
the watchdog. This may be done under program control using
the circuit shown in Figure 17b. When the control input is high,
+5V
INPUT
POWER
0.1μF
I=
V OUT – V BATT
R
R
0.1μF
the OSC SEL pin is low and the watchdog timeout is set by the
external capacitor. A 0.01 μ F capacitor sets a watchdog timeout
delay of 100 s. When the control input is low, the OSC SEL pin
is driven high, selecting the internal oscillator. The 100 ms or
V CC
V OUT
the 1.6 s period is chosen, depending on which diode in Fig-
ure 17b is used. With D1 inserted, the internal timeout is set at
RECHARGABLE
BATTERY
V BATT
ADM696
100 ms while with D2 inserted the timeout is set at 1.6 s.
WATCHDOG
WDI
STROBE
ADM69x
CONTROL
Figure 15. Rechargeable Battery
Adding Hysteresis to the Power Fail Comparator
For increased noise immunity, hysteresis may be added to the
power fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added simply by connecting a resistor
INPUT
Figure 17a. Programming the Watchdog Input
between the PFO output and the PFI input as shown in Fig-
ure 16. When PFO is low, resistor R3 sinks current from the
summing junction at the PFI pin. When PFO is high, the series
CONTROL
INPUT*
D1
D2
OSC SEL
ADM69x
combination of R3 and R4 source current into the PFI summing
junction. This results in differing trip levels for the comparator.
Alternate Watchdog Input Drive Circuits
The watchdog feature can be enabled and disabled under pro-
gram control by driving WDI with a 3-state buffer (Figure 17a).
When three-stated, the WDI input will float thereby disabling
the watchdog timer.
REV. 0
–9 –
OSC IN
*LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
Figure 17b. Programming the Watchdog Input
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