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参数资料
| 型号： | ADMC200AP |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Motion Coprocessor |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC68 |
| 封装： | PLASTIC, LCC-68 |
| 文件页数： | 10/12页 |
| 文件大小： | 134K |
| 代理商： | ADMC200AP |
ADMC200
REV. B
–
10
–
In the case of the ADSP-2171/2181, the system clock is internally
scaled; a 10 MHz system clock will derive a 20 MHz CLKOUT.
In the case of the TMS320C2x, the CLKOUT1 signal is derived
from the system clock divided by a factor of 4; consequently a
50 MHz TMS320C25-50 will derive a 12.5MHz CLKOUT1 for
use by the ADMC200.
Note: A pull-up resistor is required on the IRQ (Pin 18) output
from the ADMC200. The STOP (Pin 47) must be tied low if
not in use.
SYSTEM CLOCK FREQUENCY
The nominal range of the input clock for the ADMC200 is
6.25 MHz to 25 MHz. The external CLK frequency can be in-
ternally divided down by 2 by writing to Bit 5 of the SYSCTRL
register. If the external CLK is faster than 12.5 MHz then it is
necessary to internally divide it down.
REGISTER ADDRESSING
Four address lines (A0 through A3) are used in conjunction
with the control lines (
CS
,
WR
,
RD
,) to select registers 0
through 15. The
CS
and
RD
control lines are active low. The
registers are given symbolic names.
Table II.
Pin
Function
CS
Enables the ADMC200 register interface
(connect via chip select logic-active low)
Places data from the internal register onto the
data bus
Loads the internal register with data on the
data bus on its positive edge
RD
WR
EN
ADDRESS
DECODE
V
DD
DMS
IRQ2
RD
WR
CLKOUT
D0
–
D23
A0
–
A13
ADSP-2101/
ADSP-2105/
ADSP-2115
–
20MHz
ADSP-2171
–
10MHz
ADSP-2181
–
10MHz
CS
IRQ
RD
WR
CLK
D0
–
D11*
A0
–
A3
ADMC200
ADDRESS BUS
DATA BUS
*NOTE:
BY MAPPING THE ADMC200 DATA BUS TO THE TWELVE HIGHEST BITS
OF THE ADSP DATA BUS, FULL-SCALE OUTPUTS FROM THE ADC
CAN BE REPRESENTED BY ± 1.0 IN FIXED POINT ARITHMETIC.
Figure 11. ADI Digital Signal Processor/Microcomputer
EN
ADDRESS
DECODE
V
DD
IS
INTn
STRB
R/
W
CLKOUT1
D0
–
D15
A0
–
A15
TMS320C20
TMS320C25
TMS320C25-50
CS
IRQ
RD
WR
CLK
D0
–
D11
A0
–
A3
ADMC200
ADDRESS BUS
DATA BUS
Figure 12. TI Second-Generation Devices TMS320C20/
C25/C25
–
50
Table III. Write Registers
Name
A
3
A
2
A
1
A
0
Register Function
RHO
PHIP1/VD
PHIP2/VQ
PHIP3
RHOP
PWMTM
PWMCHA
PWMCHB
PWMCHC
PWMDT
PWMPD
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Load RHO (
ρ
) and Start Reverse Transform
Reverse Rotation Direct Input/Forward Direct Input
Reverse Rotation Direct Input/Forward Direct Input
Reverse Rotation Direct Input
Load RHOP(
ρ
) and Start Forward Transform
PWM Master Switching Period
PWM Channel A On-Time
PWM Channel B On-Time
PWM Channel C On-Time
PWM Programmable Deadtime (7-Bit Register)
PWM Pulse Deletion Value (7-Bit Register)
Reserved
Reserved
System Control
Reserved
Reserved
SYSCTRL
相关PDF资料 |
PDF描述 |
|---|---|
| ADMC200 | Motion Coprocessor(动作协处理器) |
| ADMC201AP | Motion Coprocessor |
| ADMC201 | Motion Coprocessor(动作协处理器) |
| ADMC300 | High Performance DSP-Based Motor Controller |
| ADMC300-PB | High Performance DSP-Based Motor Controller |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADMC201 | 制造商:AD 制造商全称:Analog Devices 功能描述:Motion Coprocessor |
| ADMC201AP | 制造商:Analog Devices 功能描述: |
| ADMC300 | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance DSP-Based Motor Controller |
| ADMC300-ADVEVALKIT | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance DSP-Based Motor Controller |
| ADMC300BST | 制造商:Analog Devices 功能描述:DSP Motor Controller 80-Pin TQFP 制造商:Analog Devices 功能描述:IC MOTOR CONTROLLER |
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