参数资料
型号: ADN2531ACPZ-R2
厂商: Analog Devices Inc
文件页数: 12/20页
文件大小: 0K
描述: IC LASER DRIVER 11.3GBPS 16LFCSP
标准包装: 1
类型: 激光二极管驱动器
数据速率: 11.3Gbps
通道数: 1
电源电压: 3 V ~ 3.6 V
电流 - 电源: 36mA
电流 - 调制: 80mA
电流 - 偏置: 100mA
工作温度: -40°C ~ 100°C
封装/外壳: 16-VFQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-VQ
包装: 标准包装
安装类型: 表面贴装
其它名称: ADN2531ACPZ-R2DKR
ADN2531
The equivalent circuits of the BSET, IBIAS, and IBMON pins
are shown in Figure 26 to Figure 28.
V CC
V CC
BSET
800?
Data Sheet
AUTOMATIC LASER SHUTDOWN (ALS)
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
as shown in Table 5.
Table 5. ALS Logic States
200?
Figure 26. Equivalent Circuit of the BSET Pin
IBIAS V CC
ALS Logic State
High
Low
Floating
I BIAS and I MOD
Disabled
Enabled
Enabled
V CC
100?
10 ?
2k?
The ALS pin is compatible with 3.3 V CMOS and LVTTL logic
levels. Its equivalent circuit is shown in Figure 30.
V CC V CC
1 00 ?
ALS
Figure 27. Equivalent Circuit of the IBIAS Pin
42k?
2k?
V CC
V CC
V CC
500?
100?
Figure 30. Equivalent Circuit of the ALS Pin
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current via a voltage-to-current converter that uses an
operational amplifier and a bipolar transistor, as shown in
IBMON
Figure 28. Equivalent Circuit of the IBMON Pin
V CC
The recommended configuration for the BSET, IBIAS, and
IBMON pins is shown in Figure 29.
TO LASER CATHODE
L
I BIAS
IBIAS
ADN2531
BSET
IBMON
R IBMON
750?
GND
V BSET
MSET
FROM CPA STAGE
400?
100?
I MOD
IMODP
IMODN
200?
GND
ADN2531
Figure 29. Recommended Configuration for BSET, IBIAS, and IBMON Pins
The circuit used to drive the BSET voltage must be able to drive
the 1 k? input resistance of the BSET pin. For proper operation
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
V COMPLIANCE (V) = V CC (V) ? 0.75 ? 4.4 × I BIAS (A)
See the Headroom Calculations section for examples.
The function of Inductor L is to isolate the capacitance of the
IBIAS output from the high frequency signal path. For
recommended components, see Table 6.
Figure 31. Generation of Modulation Current on the ADN2531
The dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and gained up by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins. The output stage also generates
the active back-termination, which provides proper transmission
line termination. Active back-termination uses feedback around
an active circuit to synthesize a broadband termination resistance.
This provides excellent transmission line termination while
dissipating less power than a traditional resistor passive back-
termination. No portion of the modulation current flows in the
active back-termination resistance. All of the preset modulation
current (I MOD ), the range of which is specified in Table 1, flows
into the external load.
Rev. A | Page 12 of 20
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