参数资料
| 型号： | ADN2816ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/24页 |
| 文件大小： | 0K |
| 描述： | IC CLK/DATA REC 675MBPS 32-LFCSP |
| 标准包装： | 1 |
| 类型： | 时钟和数据恢复（CDR），多路复用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH |
| 输入： | CML |
| 输出： | LVDS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 675MHz |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-VQ（5x5） |
| 包装： | 托盘 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
Continuous Rate 10 Mb/s to 675 Mb/s
Clock and Data Recovery IC
Data Sheet
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113 2005–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Serial data input: 10 Mb/s to 675 Mb/s
Exceeds SONET requirements for jitter transfer/
generation/tolerance
Patented clock recovery architecture
No reference clock required
Loss-of-lock indicator
I2C interface to access optional features
Single-supply operation: 3.3 V
Low power: 366 mW typical
5 mm × 5 mm 32-lead LFCSP, Pb free
APPLICATIONS
SONET OC-1/-3/-12 and all associated FEC rates
Fibre Channel, ESCON, Fast Ethernet, SDI
WDM transponders
Regenerators/repeaters
Test equipment
Broadband crossconnects and routers
GENERAL DESCRIPTION
The ADN2816 provides the receiver functions of quantization
and clock and data recovery for continuous data rates from
10 Mb/s to 675 Mb/s. The ADN2816 automatically locks to all
data rates without the need for an external reference clock or
programming. All SONET jitter requirements are met,
including jitter transfer, jitter generation, and jitter tolerance.
All specifications are quoted for 40°C to +85°C ambient
temperature, unless otherwise noted.
The ADN2816 is available in a compact 5 mm × 5 mm 32-lead
LFCSP.
FUNCTIONAL BLOCK DIAGRAM
2
04948-0-001
LOL
DATAOUTP/
DATAOUTN
DRVEE DVCC
DRVCC
DVEE
ADN2816
CLKOUTP/
CLKOUTN
2
VCC
VEE
CF1
CF2
PIN
NIN
VREF
BUFFER
VCO
PHASE
SHIFTER
PHASE
DETECT
FREQUENCY
DETECT
DATA
RE-TIMING
LOOP
FILTER
LOOP
FILTER
REFCLKP/REFCLKN
(OPTIONAL)
Figure 1.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADN2816ACPZ | 制造商:Analog Devices 功能描述:CLOCK & DATA RECOVERY, 160MHZ, 111mA, LF |
| ADN2816ACPZ-500RL7 | 功能描述:IC CLK/DATA REC 675MBPS 32-LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ADN2816ACPZ-RL7 | 功能描述:IC CLK/DATA REC 675MBPS 32-LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ADN2816XCPZ | 制造商:AD 制造商全称:Analog Devices 功能描述:Continuous Rate 12.3 Mb/s to 675 Mb/s Clock and Data Recovery IC |
| ADN2817 | 制造商:AD 制造商全称:Analog Devices 功能描述:Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery ICs |
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