参数资料
型号: ADN2848ACPZ-32-RL7
厂商: Analog Devices Inc
文件页数: 7/12页
文件大小: 0K
描述: IC LASER DRIVER 1.25GBPS 32LFCSP
标准包装: 1,500
类型: 激光二极管驱动器(光纤)
数据速率: 1.25Gbps
通道数: 1
电源电压: 3 V ~ 3.6 V
电流 - 电源: 50mA
电流 - 调制: 80mA
电流 - 偏置: 100mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 带卷 (TR)
安装类型: 表面贴装

Data Sheet
THEORY OF OPERATION
A laser diode (LD) has current-in to light-out transfer functions, as
shown in Figure 4. Two key characteristics of this transfer function
are the threshold current, I TH , and slope in the linear region beyond
the threshold current, referred to as slope efficiency, or LI.
ADN2848
where:
I AV is the average MPD current.
P CW is the dc optical power specified on the laser data sheet.
ER =
P1
P0
I MPD_CW is the MPD current at that specified P CW .
P1
P AV =
P1 + P0
2
P AV is the average power required.
P AV
? I
? P
LI =
? P
? I
ER is the desired extinction ratio (ER = P1/P0).
Note that I ERSET and I PSET change from device to device; however,
P0
I TH
CURRENT
the control loops determine the actual values. It is not required
to know the exact values for LI or MPD optical coupling.
Figure 4. Laser Transfer Function
CONTROL
A monitor photodiode, MPD, is required to control the LD. The
MPD current is fed into the ADN2848 to control the power and
extinction ratio, continuously adjusting the bias current and
modulation current in response to the laser’s changing
threshold current and light-to-current slope efficiency.
The ADN2848 uses automatic power control, APC, to maintain
a constant average power over time and temperature.
The ADN2848 uses closed-loop extinction ratio control to
LOOP BANDWIDTH SELECTION
For continuous operation, the user hardwires the LBWSET pin
high and uses 1 μF capacitors to set the actual loop bandwidth.
These capacitors are placed between the PAVCAP and ERCAP pins
and ground. It is important that these capacitors are low leakage
multilayer ceramics with an insulation resistance greater than
100 GΩ or a time constant of 1000 seconds, whichever is less.
Setting LBSET low and using 47 nF capacitors results in a
shorter loop time constant (a 10× reduction over using 1 μF
capacitors and keeping LBWSET high).
Table 4.
allow optimum setting of extinction ratio for every device.
Thus, SONET/SDH interface standards can be met over device
variation, temperature, and laser aging. Closed-loop
modulation control eliminates the need to either overmodulate
the LD or include external components for temperature
compensation. This reduces research and development time
Operation
Mode
Continuous
50 Mbps to
1.25 Gbps
Optimized for
1.25 Gbps
LBWSET
High
Low
Recommended
PAVCAP
1 μF
47 nF
Recommended
ERCAP
1 μF
47 nF
and second sourcing issues caused by characterizing LDs.
Average power and extinction ratio are set using the PSET and
ERSET pins, respectively. Potentiometers are connected
between these pins and ground. The potentiometer R PSET is used
to change the average power. The potentiometer R ERSET is used
to adjust the extinction ratio. Both PSET and ERSET are kept
1.2 V above GND.
For an initial setup, R PSET and R ERSET potentiometers can be
calculated using the following formulas:
ALARMS
The ADN2848 is designed to allow interface compliance to
ITU-T-G958 (11/94), section 10.3.1.1.2 (transmitter fail) and
section 10.3.1.1.3 (transmitter degrade). The ADN2848 has two
active high alarms, DEGRADE and FAIL. A resistor between
ground and the ASET pin is used to set the current at which
these alarms are raised. The current through the ASET resistor
is a ratio of 100:1 to the FAIL alarm threshold. The DEGRADE
alarm is raised at 90% of this level.
R PSET ?
1 .2 V
I AV
? ? ?
?
R ERSET ?
I MPD _ CW
P CW
1 . 2 V
ER ? 1
ER ? 1
? P AV
? ? ?
Rev. B | Page 7 of 12
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