参数资料
| 型号： | ADN2891ACPZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC AMP LIM 16LFCSP |
| 标准包装： | 5,000 |
| 放大器类型： | 限制 |
| 电路数： | 1 |
| 输出类型： | 差分 |
| 电压 - 输入偏移： | 100µV |
| 电流 - 电源： | 45mA |
| 电压 - 电源，单路/双路(±)： | 2.9 V ~ 3.6 V |
| 工作温度： | -40°C ~ 95°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ |
| 包装： | 带卷 (TR) |
ADN2891
Rev. A | Page 10 of 16
THEORY OF OPERATION
LIMITING AMPLIFIER
Input Buffer
The ADN2891 limiting amplifier provides differential inputs
(PIN/NIN), each having single-ended, on-chip, 50 Ω termina-
tion. The amplifier can accept either dc-coupled or ac-coupled
signals; however, an ac-coupled signal is recommended. Using a
dc-coupled signal, the amplifier needs a correct input common-
mode voltage and enough headroom to handle the dynamic
input signal strength. Additionally, TIA output offset drifts may
degrade receiver performance.
The ADN2891 limiting amplifier is a high gain device. It is
susceptible to dc offsets in the signal path. The pulse width
distortion presented in the NRZ data or a distortion generated
by the TIA may appear as dc offset or a corrupted signal to the
ADN2891 inputs. An internal offset correction loop can
compensate for certain levels of offset. To compensate for more
offset, an external capacitor connected between the CAZ1 and
CAZ2 pins maybe necessary. For GbE and FC applications, no
external capacitor is necessary; however, for SONET appli-
cations, a 0.01 μF capacitor helps the input signal offset
compensation and provides a 3 dB cutoff frequency at 1 kHz.
CML Output Buffer
The ADN2891 provides differential CML outputs, OUTP and
OUTN. Each output has an internal 50 Ω termination to VCC.
LOSS OF SIGNAL (LOS) DETECTOR
The on-chip LOS circuit drives LOS to logic high when the
input signal level falls below a user-programmable threshold.
The threshold level can be set to anywhere from 3.5 mV p-p to
35 mV p-p, typical, and is set by a resistor connected between
LOS threshold vs. THRADJ. The ADN2891 LOS circuit has an
electrical hysteresis greater than 2.5 dB to prevent chatter at the
LOS signal. The LOS output is an open-collector output that
must be pulled up externally with a 4.7 kΩ to 10 kΩ resistor.
RECEIVED SIGNAL STRENGTH INDICATOR (RSSI)
The ADN2891 has an on-chip, RSSI circuit. By monitoring the
current supplied to the photodiode, the RSSI circuit provides an
accurate, average power measurement. The output of the RSSI is
a current that is directly proportional to the average amount of
PIN photodiode current. Placing a resistor between the
RSSI_OUT pin and GND converts the current to a GND
referenced voltage. This function eliminates the need for
external RSSI circuitry for SFF-8472-compliant optical
receivers. For more information, see Figure 14 to Figure 18.
SQUELCH MODE
Driving the SQUELCH input to logic high disables the limiting
amplifier outputs. Using LOS output to drive the SQUELCH
input, the limiting amplifier outputs stop toggling anytime a
signal input level to the limiting amplifier drops below the
programmed LOS threshold.
The SQUELCH pin has a 100 kΩ, internal, pull-down resistor.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADN2891ACPZ-RL7 | 功能描述:IC AMP LIM 16LFCSP RoHS:是 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 标准包装:2,500 系列:- 放大器类型:通用 电路数:4 输出类型:- 转换速率:0.6 V/µs 增益带宽积:1MHz -3db带宽:- 电流 - 输入偏压:45nA 电压 - 输入偏移:2000µV 电流 - 电源:1.4mA 电流 - 输出 / 通道:40mA 电压 - 电源，单路/双路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:14-TSSOP 包装:带卷 (TR) 其它名称:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| ADN2891ACPZ-WP | 制造商:Analog Devices 功能描述:SP Amp Limiting Amp Single 3.6V 16-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:SP AMP LIMITING AMP SGL 3.6V 16LFCSP EP - Waffle Pack 制造商:Analog Devices 功能描述:APC12.7GBPS LIMITING AMPLIFIER.I.C. |
| ADN2891XCPZ | 制造商:Analog Devices 功能描述:- Trays |
| ADN2892 | 制造商:AD 制造商全称:Analog Devices 功能描述:3.3 V 4.25 Gb/s Limiting Amplifier |
| ADN2892ACP-RL | 制造商:AD 制造商全称:Analog Devices 功能描述:3.3 V 4.25 Gb/s Limiting Amplifier |
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