参数资料
型号: ADP125ACPZ-R7
厂商: Analog Devices Inc
文件页数: 13/20页
文件大小: 0K
描述: IC REG LDO ADJ .5A 8LFCSP
标准包装: 1
稳压器拓扑结构: 正,可调式
输出电压: 0.8 V ~ 5 V
输入电压: 2.3 V ~ 5.5 V
电压 - 压降(标准): 0.13V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA(最小值)
电流 - 限制(最小): 550mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-UFDFN 裸露焊盘,CSP
供应商设备封装: 8-LFCSP-UD(2x2)
包装: 标准包装
其它名称: ADP125ACPZ-R7DKR
Data Sheet
In this example, the worst-case temperature coefficient (TEMPCO)
over ?40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
C is 0.94 μF at 4.2 V from the graph in Figure 32.
Substituting these values in Equation 1 yields
C EFF = 0.94 μF × (1 ? 0.15) × (1 ? 0.1) = 0.719 μF
Therefore, the capacitor chosen in this example meets the
ADP124/ADP125
The active and inactive thresholds of the EN pin are derived from
the VIN voltage. Therefore, these thresholds vary as the input
voltage changes. Figure 34 shows typical EN active and inactive
thresholds when the VIN voltage varies from 2.3 V to 5.5 V.
1.05
1.00
0.95
minimum capacitance requirement of the LDO over tem-
perature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP124/ADP125, it is
imperative that the effects of dc bias, temperature, and tolerances
on the behavior of the capacitors are evaluated for each application.
0.90
0.85
0.80
0.75
RISING
FALLING
UNDERVOLTAGE LOCKOUT
The ADP124/ADP125 have an internal undervoltage lockout
circuit that disables all inputs and the output when the input
voltage is less than approximately 2 V. This ensures that the
ADP124/ADP125 inputs and the output behave in a predictable
manner during power-up.
ENABLE FEATURE
The ADP124/ADP125 uses the EN pin to enable and disable the
VOUT pin under normal operating conditions. As shown in
Figure 33, when a rising voltage on EN crosses the active threshold,
VOUT turns on. Conversely, when a falling voltage on EN crosses
the inactive threshold, VOUT turns off.
0.70
0.65
0.60
2.2 2.7 3.2 3.7 4.2 4.7 5.2
V IN (V)
Figure 34. Typical EN Pin Thresholds vs. Input Voltage
The ADP124/ADP125 use an internal soft start to limit the
inrush current when the output is enabled. The start-up time
for the 2.8 V option is approximately 350 μs from the time the
EN active threshold is crossed to when the output reaches 90%
of its final value. As shown in Figure 35, the start-up time is
dependent on the output voltage setting and increases slightly
as the output voltage increases.
3.5
V IN = 5V
3.0
V OUT = 4.2V
2.5
2.0
1.5
1.0
0.5
0
1
2
V OUT = 3.3V
V OUT = 2.8V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
CH1 1.00V
CH2 1.00V
B
W
M100μs
A CH1
2.00V
V EN
T
296.800μs
Figure 33. Typical EN Pin Operation
As shown in Figure 33, the EN pin has built-in hysteresis. This
prevents on/off oscillations that may occur due to noise on the
EN pin as it passes through the threshold points.
Rev. C | Page 13 of 20
Figure 35. Typical Start-Up Time
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