参数资料
| 型号： | ADP125ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ .5A 8LFCSP |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.3 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.13V @ 500mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 500mA（最小值） |
| 电流 - 限制（最小）： | 550mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-UFDFN 裸露焊盘，CSP |
| 供应商设备封装： | 8-LFCSP-UD（2x2） |
| 包装： | 标准包装 |
| 其它名称： | ADP125ACPZ-R7DKR |
Data Sheet
ABSOLUTE MAXIMUM RATINGS
ADP124/ADP125
Table 3.
Parameter
VIN to GND
ADJ to GND
EN to GND
VOUT to GND
Storage Temperature Range
Operating Ambient Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
?0.3 V to +6.5 V
?0.3 V to +6.5 V
?0.3 V to +6.5 V
?0.3 V to VIN
?65°C to +150°C
?40°C to +85°C
?40°C to +125°C
JEDEC J-STD-020
application and board layout. In applications in which high maxi-
mum power dissipation exists, close attention to thermal board
design is required. The value of θ JA may vary, depending on PCB
material, layout, and environmental conditions. The specified
values of θ JA are based on a 4-layer, 4 inch × 3 inch circuit board.
Refer to JESD 51-7 for detailed information on the board
construction.
Ψ JB is the junction-to-board thermal characterization parameter
and is measured in °C/W. The Ψ JB of the package is based on
modeling and calculation using a 4-layer board. The Guidelines for
Reporting and Using Package Thermal Information: JESD51-12
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP124/ADP125 can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that T J will remain within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be limited.
states that thermal characterization parameters are not the same
as thermal resistances. Ψ JB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ JB . Therefore, Ψ JB thermal paths include
convection from the top of the package as well as radiation from
the package—factors that make Ψ JB more useful in real-world
applications. Maximum junction temperature (T J ) is calculated
from the board temperature (T B ) and power dissipation (P D )
using the formula
T J = T B + ( P D × Ψ JB )
Refer to JESD51-8 and JESD51-12 for more detailed information
about Ψ JB .
THERMAL RESISTANCE
θ JA and Ψ JB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T J ) of
the device is dependent on the ambient temperature (T A ), the
power dissipation of the device (P D ), and the junction-to-ambient
thermal resistance of the package (θ JA ).
Table 4. Thermal Resistance
Package Type θ JA
8-Lead MSOP 102.8
8-Lead LFCSP 68.9
ESD CAUTION
Ψ JB
31.8
44.1
Unit
°C/W
°C/W
Maximum junction temperature (T J ) is calculated from the
ambient temperature (T A ) and power dissipation (P D ) using the
formula
T J = T A + ( P D × θ JA )
The junction-to-ambient thermal resistance (θ JA ) of the package
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
Rev. C | Page 5 of 20
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