参数资料
型号: ADP130AUJZ-1.5-R7
厂商: Analog Devices Inc
文件页数: 14/20页
文件大小: 0K
描述: IC REG LDO 1.5V .35A TSOT-23-5
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 1.5V
输入电压: 最高 3.6V
电压 - 压降(标准): 0.07V @ 350mA
稳压器数量: 1
电流 - 输出: 350mA(最小值)
电流 - 限制(最小): 400mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: TSOT-23-5
包装: 标准包装
其它名称: ADP130AUJZ-1.5-R7DKR
ADP130
Use Equation 1 to determine the worst-case capacitance,
accounting for capacitor variation over temperature, compo-
nent tolerance, and voltage.
Data Sheet
As shown in Figure 37, the EN pin has built-in hysteresis. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
C EFF = C OUT × (1 ? TEMPCO ) × (1 ? TOL )
(1)
The EN pin active and inactive thresholds are derived from the
where:
C EFF is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, TEMPCO over ?40°C to +85°C is assumed to be
15% for an X5R dielectric. TOL is assumed to be 10%, and C OUT
= 0.94 μF at 1.8 V, as shown in Figure 36.
V IN voltage. Therefore, these thresholds vary with changing input
voltage. Figure 38 shows typical EN active and inactive thresholds
when the V BIAS voltage varies from 2.3 V to 5.5 V.
1.10
1.05
1.00
0.95
Substituting these values in Equation 1 yields the following:
C EFF = 0.94 μF × (1 ? 0.15) × (1 ? 0.1) = 0.719 μF
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over tempera-
ture and tolerance at the chosen output voltage.
To guarantee the performance of the ADP130, it is imperative
0.90
0.85
0.80
0.75
0.70
0.65
EN ACTIVE
EN INACTIVE
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
0.60
2.3
2.7
3.1
3.5
3.9
V BIAS (V)
4.3
4.7
5.1
5.5
UNDERVOLTAGE LOCKOUT
The ADP130 has an internal undervoltage lockout circuit that
disables all inputs and the output when the input voltage is less
than approximately 2.1 V. This ensures that the ADP130 inputs
and the output behave in a predictable manner during power-up.
ENABLE FEATURE
The ADP130 uses the EN pin to enable and disable the VOUT
Figure 38. Typical EN Pin Thresholds vs. Input
The ADP130 uses an internal soft start to limit the inrush current
when the output is enabled. The start-up time for the 0.8 V option
is approximately 180 μs from the time at which the EN active
threshold is crossed to when the output reaches 90% of its final
value. The start-up time depends somewhat on the output voltage
setting and increases slightly as the output voltage increases.
pin under normal operating conditions. As shown in Figure 37,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
V OUT = 1.8V
C IN = C OUT = 1μF
V OUT
500mV/DIV
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ENABLE
3.0V
1.8V
1.2V
0.8V
V BIAS = 2.3V
V IN = 3.6V
I LOAD = 10mA
EN
500mV/DIV
0
0
100
200
300
400
500
600
700
800
900 1000
TIME (μs)
2
1
Figure 39. Typical Start-Up Time for Various Output Voltages
CH1 500mV
CH2 500mV
M10ms
A CH2
640mV
T 30%
Figure 37. Typical EN Pin Operation
Rev. C | Page 14 of 20
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