参数资料
型号: ADP130AUJZ-1.5-R7
厂商: Analog Devices Inc
文件页数: 17/20页
文件大小: 0K
描述: IC REG LDO 1.5V .35A TSOT-23-5
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 1.5V
输入电压: 最高 3.6V
电压 - 压降(标准): 0.07V @ 350mA
稳压器数量: 1
电流 - 输出: 350mA(最小值)
电流 - 限制(最小): 400mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: TSOT-23-5
包装: 标准包装
其它名称: ADP130AUJZ-1.5-R7DKR
Data Sheet
In cases where board temperature is known, use the thermal char-
acterization parameter, Ψ JB , to estimate the junction temperature
rise. Maximum junction temperature (T J ) is calculated from the
board temperature (T B ) and power dissipation (P D ), using the
following formula:
ADP130
PCB LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP130.
However, as shown in Table 6, a point of diminishing return is
eventually reached, beyond which an increase in the copper size
T J = T B + ( P D × Ψ JB )
(5)
does not yield significant heat dissipation benefits.
The typical value of Ψ JB is 42.8°C/W for the 5-lead TSOT package.
The input capacitor should be placed as close as possible to the
VIN and GND pins. The output capacitor should be placed as
140
120
100
MAX T J (DO NOT OPERATE ABOVE THIS POINT)
close as possible to the VOUT and GND pins. Using 0402 or 0603
size capacitors and resistors achieves the smallest possible foot-
print solution on boards where the area is limited.
80
GND
ANALOG DEVICES
ADP130-xx-EVALZ
GND
60
C1
U1
C2
40
20
0
0.4
1mA
10mA
0.8
50mA
100mA
1.2
1.6
150mA
250mA
2.0
350mA
(I LOAD )
2.4
2.8
VIN
J1
VOUT
V IN – V OUT (V)
Figure 46. TSOT, T A = 85°C
C3
GND
EN
VBIAS
GND
Figure 47. Example TSOT PCB Layout
Rev. C | Page 17 of 20
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ADP130AUJZ-1.2-R7 IC REG LDO 1.2V .35A TSOT-23-5
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