参数资料
型号: ADP1864AUJZ-R7
厂商: Analog Devices Inc
文件页数: 9/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM TSOT23-6
产品培训模块: Power Line Monitoring
标准包装: 1
PWM 型: 电流模式
输出数: 1
频率 - 最大: 650kHz
占空比: 100%
电源电压: 3.15 V ~ 14 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: SOT-23-6 细型,TSOT-23-6
包装: 标准包装
产品目录页面: 791 (CN2011-ZH PDF)
配用: ADP1864-EVALZ-ND - BOARD EVALUATION ADP1864
其它名称: ADP1864AUJZ-R7DKR
Data Sheet
SHORT-CIRCUIT PROTECTION
If there is a short across the output load, the voltage at the
feedback pin (FB) drops rapidly. When the FB voltage drops
below 0.35 V, the ADP1864 reduces the oscillator frequency
to 190 kHz. The increase in the oscillator period allows the
inductor additional time to discharge, preventing the output
current from running away. Once the output short is removed
and the feedback voltage increases above the 0.35 V threshold,
the oscillator frequency returns to 580 kHz.
UNDERVOLTAGE LOCKOUT (UVLO)
To prevent erratic operation when the input voltage drops
below the minimum acceptable voltage, the ADP1864 has an
undervoltage lockout (UVLO) feature. If the input voltage
drops below 2.90 V, PGATE is pulled high and the ADP1864
ADP1864
OVERVOLTAGE LOCKOUT PROTECTION (OVP)
The ADP1864 provides an overvoltage protection feature to
protect the system against output short circuits to a higher
voltage supply. If the feedback voltage increases to 0.885 V,
PGATE is held high, turning the external FET off. The FET
continues to be held high until the voltage at FB decreases to
0.84 V, at which time the ADP1864 resumes normal operation.
SOFT START
The ADP1864 includes a soft start feature that limits the rate of
increase in the inductor current once the part is enabled. Soft
start is activated when the input voltage is increased above the
UVLO threshold or COMP is released from GND. Soft start
limits the inrush current at the input and limits the output
voltage overshoot. The soft start control slope is set internally.
continues to draw its typical quiescent current. Current consump-
tion continues to drop toward the shutdown current as input
voltage is reduced. The ADP1864 is re-enabled and begins
switching once the IN voltage is increased above the UVLO
rising threshold (3.0 V).
Rev. C | Page 9 of 16
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