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参数资料
| 型号： | ADP1879ACPZ-0.6-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 35/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 14LFCSP |
| 标准包装： | 1,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 占空比： | 65% |
| 电源电压： | 2.95 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 14-WFDFN 裸露焊盘，CSP |
| 包装： | 带卷 (TR) |
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Data Sheet
BOTTOM
RESISTOR TAP
TO ANALOG
GROUND PLANE
PGND SENSE TAP FROM
NEGATIVE TERMINALS OF
THE OUTPUT BULK
CAPACITORS. THIS
TRACK PLACEMENT
SHOULD BE DIRECTLY
BELOW THE VOUT SENSE
LINE OF LAYER 3.
Figure 90. Layer 4 (Bottom Layer) of Evaluation Board
ADP1878/ADP1879
IC SECTION (LEFT SIDE OF EVALUATION BOARD)
A dedicated plane for the analog ground plane (GND) should
be separate from the main power ground plane (PGND). With
the shortest path possible, connect the analog ground plane to
the GND pin (Pin 5). Place this plane on the top layer only of
the evaluation board. To avoid crosstalk interference, do not
allow any other voltage or current pathway directly below this
plane on Layer 2, Layer 3, or Layer 4. Connect the negative
terminals of all sensitive analog components to the analog
ground plane. Examples of such sensitive analog components
include the bottom resistor of the resistor divider, the high
frequency bypass capacitor for biasing (0.1 μF), and the
compensation network.
Mount a 1 μF bypass capacitor directly across the VREG pin
(Pin 7) and the PGND pin (Pin 11). In addition, tie a 0.1 μF
across the VREG pin (Pin 7) and the GND pin (Pin 5).
POWER SECTION
As shown in Figure 87, an appropriate configuration to localize
large current transfer from the high voltage input (V IN ) to the
output (V OUT ) and then back to the power ground is to put the
V IN plane on the left, the output plane on the right, and the main
power ground plane in between the two. Current transfers from
the input capacitors to the output capacitors, through Q1/Q2,
during the on state (see Figure 91). The direction of this current
(yellow arrow) is maintained as Q1/Q2 turns off and Q3/Q4 turns
on. When Q3/Q4 turns on, the current direction continues to be
maintained (red arrow) as it circles from the power ground
terminal of the bulk capacitor to the output capacitors, through
the Q3/Q4. Arranging the power planes in this manner minimizes
the area in which changes in flux occur if the current through
Q1/Q2 stops abruptly. Sudden changes in flux, usually at the
source terminals of Q1/Q2 and the drain terminal of Q3/Q4,
cause large dV/dt at the SW node.
The SW node is near the top of the evaluation board. The SW
node should use the least amount of area possible and be away
from any sensitive analog circuitry and components. This is
because the SW node is where most sudden changes in flux
density occur. When possible, replicate this pad onto Layer 2
and Layer 3 for thermal relief and eliminate any other voltage and
current pathways directly beneath the SW node plane. Populate
the SW node plane with vias, mainly around the exposed pad of
the inductor terminal and around the perimeter of the source of
Q1/Q2 and the drain of Q3/Q4.
The output voltage power plane (V OUT ) is at the rightmost end of
the evaluation board. This plane should be replicated, descending
down to multiple layers with vias surrounding the inductor
terminal and the positive terminals of the output bulk capacitors.
Ensure that the negative terminals of the output capacitors are
placed close to the main power ground (PGND), as previously
mentioned. All of these points form a tight circle (component
geometry permitting) that minimizes the area of flux change as
the event switches between D and 1 ? D.
Rev. B | Page 35 of 40
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| ADP1879ACPZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 14LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1880ACPZ-R7 | 制造商:Analog Devices 功能描述: |
| ADP1882 | 制造商:AD 制造商全称:Analog Devices 功能描述:Synchronous Current-Mode with Constant On-Time,PWM Buck Controller |
| ADP1882-0.3-EVALZ | 功能描述:EVAL BOARD FOR ADP1882 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1882-0.6-EVALZ | 功能描述:EVAL BOARD FOR ADP1882 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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