参数资料
型号: ADP191ACBZ-R7
厂商: Analog Devices Inc
文件页数: 10/16页
文件大小: 0K
描述: IC CTLR HIGH LSIDE PWR SW 4WLCSP
产品变化通告: 8mm Carrier Tape Changes 28/Feb/2012
标准包装: 1
类型: 高端开关
导通状态电阻: 105 毫欧
电源电压: 1.1 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-WFBGA,WLCSP
供应商设备封装: 4-WLCSP(0.76x0.76)
包装: 标准包装
配用: ADP191CB-EVALZ-ND - EVAL BOARD FOR ADP191
其它名称: ADP191ACBZ-R7DKR

ADP190/ADP191
APPLICATIONS INFORMATION
GROUND CURRENT
The major source for ground current in the ADP190 / ADP191 is
the 4 M? pull-down on the enable (EN) pin. Figure 19 shows
typical ground current when V EN = V IN and V IN varies from 1.1 V
to 3.6 V.
2.0
2.0
1.8
1.6
1.4
1.2
1.0
Data Sheet
1.8
V IN = 3.6V
0.8
0.6
1.6
1.4
V IN = 2.5V
0.4
0.2
0
1.2
0
0.1
0.2
0.3
0.4
0.5
0.6
V EN (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.0
Figure 21. Typical EN Operation
0.8
0.6
0
50
100
V IN = 1.8V
V IN = 1.2V
150 200
LOAD (mA)
250
300
350
As shown in Figure 21, the EN pin has built-in hysteresis. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds derive from the VIN
Figure 19. Ground Current vs. Load Current
As shown in Figure 20, an increase in ground current can occur
when V EN ≠ V IN . This is caused by the CMOS logic nature of the
level shift circuitry as it translates an EN signal ≥ 1.1 V to
a logic high. This increase is a function of the V IN ? V EN delta.
voltage; therefore, these thresholds vary with changing input
voltage. Figure 22 shows typical EN active/inactive thresholds
when the input voltage varies from 1.1 V to 3.6 V.
1.15
1.05
14
0.95
12
10
8
V OUT = 3.6V
0.85
0.75
0.65
EN ACTIVE
EN INACTIVE
0.55
6
0.45
4
0.35
2
V OUT = 1.8V
0
0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5
V EN (V)
Figure 20. Typical Ground Current when V EN ≠ V IN
ENABLE FEATURE
The ADP190 / ADP191 use the EN pin to enable and disable the
VOUT pin under normal operating conditions. As shown in
Figure 21, when a rising voltage on EN crosses the active
V IN (V)
Figure 22. Typical EN Pin Thresholds vs. Input Voltage, V IN
TIMING
Turn-on delay is defined as the delta between the time that EN
reaches >1.1 V until VOUT rises to ~10% of its final value. The
ADP190 / ADP191 include circuitry to set the typical 1.5 μs turn-
on delay at 3.6 V V IN to limit the V IN inrush current. As shown in
Figure 23, the turn-on delay is dependent on the input voltage.
threshold, VOUT turns on. When a falling voltage on EN
crosses the inactive threshold, VOUT turns off.
Rev. E | Page 10 of 16
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